ADC1415S125/DB,598 NXP Semiconductors, ADC1415S125/DB,598 Datasheet - Page 6

BOARD DEMO FOR ADC1415S125

ADC1415S125/DB,598

Manufacturer Part Number
ADC1415S125/DB,598
Description
BOARD DEMO FOR ADC1415S125
Manufacturer
NXP Semiconductors
Type
A/Dr

Specifications of ADC1415S125/DB,598

Number Of Adc's
1
Number Of Bits
14
Sampling Rate (per Second)
125M
Data Interface
Serial, SPI™
Inputs Per Adc
1 Differential
Input Range
1 ~ 2 Vpp
Power (typ) @ Conditions
840mW @ 125Msps
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC1415S125
Product
Data Conversion Development Tools
Conversion Rate
125 MSPS
Resolution
14 bit
Interface Type
SMA
For Use With/related Products
ADC1415S125
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-5094
NXP Semiconductors
7. Limiting values
8. Thermal characteristics
ADC1415S_SER
Product data sheet
Table 3.
[1]
[2]
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
Table 5.
[1]
Symbol
D0_D1_P
DAVM
DAVP
Symbol
V
V
V
V
T
T
T
Symbol
R
R
stg
amb
j
O
DDA(3V)
DDA(5V)
DDO
th(j-a)
th(j-c)
Pins 1 to 16 and pins 33 to 40 are the same for both CMOS and LVDS DDR outputs (see
P: power supply; G: ground; I: input; O: output; I/O: input/output.
Value for six layers board in still air with a minimum of 25 thermal vias.
Parameter
output voltage
analog supply
voltage 3 V
analog supply
voltage 5 V
output supply voltage
storage temperature
ambient temperature
junction temperature
Pin description
Limiting values
Thermal characteristics
Parameter
thermal resistance from junction to ambient
thermal resistance from junction to case
Pin
30
31
32
All information provided in this document is subject to legal disclaimers.
Single 14-bit ADC; input buffer; CMOS or LVDS DDR digital outputs
[1]
Rev. 4 — 17 December 2010
Type
O
O
O
…continued
[2]
Conditions
pins D13 to D0 or
pins D12_D13_P to D0_D1_P
and D12_D13_M to D0_D1_M
on pin VDDA3V
on pin VDDA5V
Description
differential output data D0 and D1 multiplexed, true
data valid output clock, complement
data valid output clock, true
(LVDS DDR) digital outputs)
ADC1415S series
Conditions
Min
−0.4
−0.4
−0.5
−0.4
−55
−40
-
[1]
[1]
Typ
30.5
13.3
© NXP B.V. 2010. All rights reserved.
Max
+3.9
+4.6
+6.0
+4.6
+125
+85
125
Table
Unit
K/W
K/W
2)
Unit
V
V
V
V
°C
°C
°C
6 of 42

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