EVAL-ADUC847QSZ Analog Devices Inc, EVAL-ADUC847QSZ Datasheet - Page 85

• Manufacturer Part Number: EVAL-ADUC847QSZ
• Description: KIT DEV QUICK START FOR ADUC847
• Manufacturer: Analog Devices Inc
• Series: QuickStart™ Kitr
• Type: MCUr

Specifications of EVAL-ADUC847QSZ

• Contents: Evaluation Board, Power Supply, Cable, Software and Documentation
• Silicon Manufacturer: Analog Devices
• Core Architecture: 8051
• Silicon Core Number: ADuC847
• Tool / Board Applications: General Purpose MCU, MPU, DSP, DSC
• Mcu Supported Families: ADUC8xx
• Development Tool Type: Hardware - Eval/Demo Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADuC847
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

INTERRUPT SYSTEM
The ADuC845/ADuC847/ADuC848 provide nine interrupt sources with two priority levels. The control and configuration of the
interrupt system is carried out through three interrupt-related SFRs:
IE
IP
IEIP2
IE—Interrupt Enable Register
SFR Address:
Power-On Default:
Bit Addressable:
Table 58. IE SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
IP—Interrupt Priority Register
SFR Address:
Power-On Default:
Bit Addressable:
Table 59. IP SFR Bit Designations
Bit No.
7
6
5
4
3
2
1
0
Interrupt Enable Register
Interrupt Priority Register
Secondary Interrupt Enable Register
Name
EA
EADC
ET2
ES
ET1
EX1
ET0
EX0
Name
-----
PADC
PT2
PS
PT1
PX1
PT0
PX0
A8H
00H
Yes
B8H
00H
Yes
Set by the user to enable all interrupt sources.
Cleared by the user to disable all interrupt sources.
Set by the user to enable the ADC interrupt.
Cleared by the user to disable the ADC interrupt.
Set by the user to enable the Timer 2 interrupt.
Cleared by the user to disable the Timer 2 interrupt.
Set by the user to enable the UART serial port interrupt.
Cleared by the user to disable the UART serial port interrupt.
Set by the user to enable the Timer 1 interrupt.
Cleared by the user to disable the Timer 1 interrupt.
Set by the user to enable External Interrupt 1 (INT0).
Cleared by the user to disable External Interrupt 1 (INT0).
Set by the user to enable the Timer 0 interrupt.
Cleared by the user to disable the Timer 0 interrupt.
Set by the user to enable External Interrupt 0 (INT0).
Cleared by the user to disable External Interrupt 0 (INT0).
Description
Description
Not Implemented. Write Don’t Care.
ADC Interrupt Priority (1 = High; 0 = Low).
Timer 2 Interrupt Priority (1 = High; 0 = Low).
UART Serial Port Interrupt Priority (1 = High; 0 = Low).
Timer 1 Interrupt Priority (1 = High; 0 = Low).
INT0 (External Interrupt 1) priority (1 = High; 0 = Low).
Timer 0 Interrupt Priority (1 = High; 0 = Low).
INT0 (External Interrupt 0) Priority (1 = High; 0 = Low).
Rev. B | Page 85 of 108
ADuC845/ADuC847/ADuC848