MPC8360E-RDK Freescale Semiconductor, MPC8360E-RDK Datasheet - Page 2

BOARD REFERENCE DESIGN FOR MPC

MPC8360E-RDK

Manufacturer Part Number
MPC8360E-RDK
Description
BOARD REFERENCE DESIGN FOR MPC
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II™ PROr
Type
MPUr
Datasheets

Specifications of MPC8360E-RDK

Contents
Board, Cables, CD, Power Supply
Processor To Be Evaluated
MPC8360E
Data Bus Width
32 bit
Interface Type
RS-232, Ethernet, USB
Operating Supply Voltage
1.3 V
For Use With/related Products
MPC8360E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Overview
1
This section describes a high-level overview including features and general operation of the
MPC8360E/58E PowerQUICC II Pro processor. A major component of this device is the e300 core, which
includes 32 Kbytes of instruction and data cache and is fully compatible with the Power Architecture™
603e instruction set. The new QUICC Engine module provides termination, interworking, and switching
between a wide range of protocols including ATM, Ethernet, HDLC, and POS. The QUICC Engine
module’s enhanced interworking eases the transition and reduces investment costs from ATM to IP based
systems. The other major features include adual DDR SDRAM memory controller for the MPC8360E,
which allows equipment providers to partition system parameters and data in an extremely efficient way,
such as using one 32-bit DDR memory controller for control plane processing and the other for data plane
processing. The MPC8358E has a single DDR SDRAM memory controller. The MPC8360E/58E also
offers a 32-bit PCI controller, a flexible local bus, and a dedicated security engine.
Figure 1
2
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
Overview
8 TDM Ports
shows the MPC8360Eblock diagram.
JTAG/COP
Generators
Parallel I/O
Baud Rate
I-Cache
32KB
FPU
Classic G2 MMUs
QUICC Engine Module
e300 Core
Time Slot Assigner
Management
8 MII/
RMII
D-Cache
Accelerators
Timers
Power
32KB
Dual 32-Bit RISC CP
Serial Interface
RGMII/TBI/RTBI
Figure 1. MPC8360E Block Diagram
2 GMII/
Multi-User
RAM
Security Engine
2 UTOPIA/POS
(124 MPHY)
Serial DMA
2 Virtual
DMAs
&
Protection & Configuration
32/64 DDR Interface Unit
System Interface Unit
GPCM/UPM/SDRAM
Memory Controllers
Interrupt Controller
Clock Synthesizer
4 Channel DMA
Bus Arbitration
System Reset
PCI Bridge
Local Bus
Dual I2C
DUART
(SIU)
Freescale Semiconductor
DDRC1
DDRC2
Local
PCI

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