HW-V5-ML501-UNI-G Xilinx Inc, HW-V5-ML501-UNI-G Datasheet - Page 14

• Manufacturer Part Number: HW-V5-ML501-UNI-G
• Description: EVALUATION PLATFORM VIRTEX-5
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr
• Type: FPGAr

Specifications of HW-V5-ML501-UNI-G

• Design Resources: ML501 Ref Design User Guide ML501 Schematics
• Contents: ML501 Platform, DVI Adapter and CompactFlash Card
• Silicon Manufacturer: Xilinx
• Features: Programmable System Clock Generator Chip, RS-232 Serial Port
• Silicon Family Name: Virtex-5
• Silicon Core Number: XC5VLX50FFG676
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: XC5VLX50FFG676
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 122-1508

Chapter 1: ML501 Evaluation Platform
14
1. Virtex-5 FPGA
Configuration
I/O Voltage Rails
A Xilinx Virtex-5 FPGA, XC5VLX50-1FFG676, is installed on the Evaluation Platform (the
board).
The board supports configuration in all modes: JTAG, Master Serial, Slave Serial, Master
SelectMAP, Slave SelectMAP, Byte-wide Peripheral Interface (BPI) Up, BPI Down, and SPI
modes. See the
The FPGA has 14 banks. The I/O voltage applied to each bank is summarized in
Table 1-1: I/O Voltage Rail of FPGA Banks
FPGA Bank
11
12
13
14
15
16
17
18
21
0
1
2
3
4
“Configuration Options,” page 36
3.3V
3.3V
3.3V
2.5V
3.3V
User selectable as 2.5V or 3.3V using jumper J20
3.3V
User selectable as 2.5V or 3.3V using jumper J20
1.8V
3.3V
1.8V
3.3V
1.8V
1.8V
www.xilinx.com
I/O Voltage Rail
section for more information.
UG226 (v1.4) August 24, 2009
ML501 Evaluation Platform
Table
1-1.
R