101-1017 Rabbit Semiconductor, 101-1017 Datasheet - Page 40

• Manufacturer Part Number: 101-1017
• Description: KIT DEV POWERCORE 3800 INT'L
• Manufacturer: Rabbit Semiconductor
• Series: PowerCore FLEXr
• Type: MPU Moduler

Specifications of 101-1017

• Contents: RabbitCore Module, Dev. Board, AC Adapter, Cable and Dynamic C® CD-Rom
• Processor To Be Evaluated: PowerCore 38xx
• Interface Type: Ethernet
• For Use With/related Products: RCM3800
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

4.1.1 Internal and External Buses
The Rabbit 3000 address lines (A0–A19) and all the data lines (D0–D7) are routed inter-
nally to the onboard flash memory, SRAM, and Ethernet chips. These lines do not appear
on header J4. It would be undesirable (and unnecessary) to run these lines to the mother-
board as they must operate at high frequencies and any additional load capacitance would
be undesirable.
A completely separate I/O bus is implemented using eight data lines and six address lines.
Various strobes can be implemented to clock data to or from the bus. The I/O bus is an
option that can be enabled by the user’s program as explained below. The eight bidirec-
tional I/O lines share pins with Parallel Port A, and the six address lines share pins with
part of Parallel Port B. Although only 64 read or write addresses are available directly, it
easy to expand the register space of the bus to be as large as desired by adding additional
address bits implemented using a register loadable as one of the 64 registers. Another
approach is to use additional separate strobe lines to create additional 64-register spaces.
Rabbit I/O instructions are used to access the registers created on the I/O bus. Strobes are
enabled by software setup of individual pins on Parallel Port E. More details are available
in the Rabbit 3000 Users’ Manual.
Parallel Port A can also be used as an external I/O data bus to isolate external I/O from the
main data bus. The pins on Parallel Port B used as I/O bus address lines can be used as
individual lines when the I/O bus is not enabled. Parallel Port B pins PB2–PB7 can also be
used as an auxiliary address bus.
When using the auxiliary I/O bus for either Ethernet or the LCD/keypad module on the
Prototyping Board, or for any other reason, you must add the following line at the begin-
ning of your program.
#define PORTA_AUX_IO
// required to enable auxiliary I/O bus
4.1.1.1 Handling Stateful I/O Registers
I/O registers are often either readable or writable, but not both in order to save hardware
expense or because the functionality does not fit a read/write model. For example, if writ-
ing a certain bit in a register causes a momentary action to take place, the bit in the register
does not really exist and there is nothing to read back.
If an I/O register is stateful, it is a write register that holds bits that have a continuing
meaning over time. If this information has to be changed and restored at different priority
levels, for example, in a main program and in an interrupt routine, there must be a way to
read the contents of the register and restore it. One approach is to make the register read-
able, but this requires extra hardware. The other approach is to establish a shadow register
in memory that holds an echo of the register contents—the shadow register is loaded each
time the register is loaded. Care must be taken with shadow registers to ensure that an
interrupt cannot take place when the contents of the shadow register differ from those of
the I/O register. The Rabbit 3000 Users’ Manual provides additional information.
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PowerCore FLEX