EVAL-ADUC7023QSPZ Analog Devices Inc, EVAL-ADUC7023QSPZ Datasheet - Page 27

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EVAL-ADUC7023QSPZ

Manufacturer Part Number
EVAL-ADUC7023QSPZ
Description
KIT DEV FOR ADUC7023 QUICK START
Manufacturer
Analog Devices Inc
Type
MCUr
Datasheet

Specifications of EVAL-ADUC7023QSPZ

Contents
Board
Silicon Manufacturer
Analog Devices
Core Architecture
ARM
Core Sub-architecture
ARM7TDMI
Silicon Core Number
ADuC7023
For Use With/related Products
ARM7TDMI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 21. PWM Base Address = 0xFFFF0F80
Address
0x0F80
0x0F84
0x0F88
0x0F8C
0x0F90
0x0F94
0x0F98
0x0F9C
0x0FA0
0x0FA4
0x0FA8
0x0FB8
Table 22. GPIO Base Address = 0xFFFFF400
Address
0xF400
0xF404
0xF408
0xF420
0xF424
0xF428
0xF42C
0xF430
0xF434
0xF438
0xF43C
0xF440
0xF444
0xF448
0xF44C
Table 23. Flash/EE Base Address = 0xFFFFF800
Address
0xF800
0xF804
0xF808
0xF80C
0xF810
0xF818
0xF81C
0xF820
Name
PWMCON1
PWM0COM0
PWM0COM1
PWM0COM2
PWM0LEN
PWM1COM0
PWM1COM1
PWM1COM2
PWM1LEN
PWM2COM0
PWM2COM1
PWMCLRI
Name
GP0CON
GP1CON
GP2CON
GP0DAT
GP0SET
GP0CLR
GP0PAR
GP1DAT
GP1SET
GP1CLR
GP1PAR
GP2DAT
GP2SET
GP2CLR
GP2PAR
Name
FEESTA
FEEMOD
FEECON
FEEDAT
FEEADR
FEESIGN
FEEPRO
FEEHIDE
Byte
2
2
2
2
2
2
2
2
2
2
2
2
4
4
4
4
4
4
Byte
4
4
4
4
4
4
4
4
4
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
Access Type
Byte
1
2
1
2
2
3
4
4
Access Type
R/W
R/W
R/W
R/W
W
W
R/W
R/W
W
W
R/W
R/W
W
W
R/W
Access Type
R
R/W
R/W
R/W
R/W
R
R/W
R/W
Default Value
0x0012
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
0x0000
Rev. B | Page 27 of 96
Default Value
0x00001111
0x00000000
0x00000000
0x000000XX
0x000000XX
0x000000XX
0x22220000
0x000000XX
0x000000XX
0x000000XX
0x22000022
0x000000XX
0x000000XX
0x000000XX
0x00000000
Default Value
0x20
0x0000
0x07
0xXXXX
0x0000
0xFFFFFF
0x00000000
0xFFFFFFFF
Description
PWM Control Register 1. See the Pulse-Width Modulator section for
full details.
Compare Register 0 for PWM Output 0 and PWM Output 1.
Compare Register 1 for PWM Output 0 and PWM Output 1.
Compare Register 2 for PWM Output 0 and PWM Output 1.
Frequency control for PWM Output 0 and PWM Output 1.
Compare Register 0 for PWM Output 2 and PWM Output 3.
Compare Register 1 for PWM Output 2 and PWM Output 3.
Compare Register 2 for PWM Output 2 and PWM Output 3.
Frequency control for PWM Output 2 and PWM Output 3.
Compare Register 0 for PWM Output 4 and PWM Output 5.
Compare Register 1 for PWM Output 4 and PWM Output 5.
PWM interrupt clear register. Writing any value to this register
clears a PWM interrupt source.
GPIO Port0 control MMR.
GPIO Port1 control MMR.
GPIO Port2 control MMR.
GPIO Port0 data control MMR.
GPIO Port0 data set MMR.
GPIO Port0 data clear MMR.
GPIO Port0 pull-up disable MMR.
GPIO Port1 data control MMR.
GPIO Port1 data set MMR.
GPIO Port1 data clear MMR.
GPIO Port1 pull-up disable MMR.
GPIO Port2 data control MMR.
GPIO Port2 data set MMR.
GPIO Port2 data clear MMR.
GPIO Port2 pull-up disable MMR.
Description
Description
Flash/EE status MMR.
Flash/EE control MMR.
Flash/EE control MMR.
Flash/EE data MMR.
Flash/EE address MMR.
Flash/EE LFSR MMR.
Flash/EE protection MMR.
Flash/EE protection MMR.
ADuC7023

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