EVAL-ADUC7023QSPZ Analog Devices Inc, EVAL-ADUC7023QSPZ Datasheet - Page 48
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EVAL-ADUC7023QSPZ
Manufacturer Part Number
EVAL-ADUC7023QSPZ
Description
KIT DEV FOR ADUC7023 QUICK START
Manufacturer
Analog Devices Inc
Type
MCUr
Datasheet
1.EVAL-ADUC7023QSPZ.pdf
(96 pages)
Specifications of EVAL-ADUC7023QSPZ
Contents
Board
Silicon Manufacturer
Analog Devices
Core Architecture
ARM
Core Sub-architecture
ARM7TDMI
Silicon Core Number
ADuC7023
For Use With/related Products
ARM7TDMI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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ADuC7023
MMRs and Keys
The operating mode, clocking mode, and programmable clock
divider are controlled via three MMRs, PLLCON (see Table 48)
and POWCONx. PLLCON controls the operating mode of the
clock system, POWCON0 controls the core clock frequency and
the power-down mode, POWCON1 controls the clock
frequency to I
To prevent accidental programming, a certain sequence has to
be followed to write to the PLLCON and POWCONx registers.
PLLKEY1 Register
Name:
Address:
Default value:
Access:
PLLKEY2 Register
Name:
Address:
Default value:
Access:
PLLCON Register
Name:
Address:
Default value:
Access:
Table 48. PLLCON MMR Bit Designations
Bit
7 to 6
5
4 to 2
1 to 0
Value
00
01
10
11
2
C and SPI.
PLLKEY1
0xFFFF0410
0xXXXX
Write
PLLKEY2
0xFFFF0418
0xXXXX
Write
PLLCON
0xFFFF0414
0x21
Read/write
Name
OSEL
MDCLK
Description
Reserved.
32 kHz PLL input selection.
This bit is set by the user to select
the internal 32 kHz oscillator. This
bit is set by default.
This bit is cleared by the user to
select the external 32 kHz crystal.
Reserved.
Clocking modes.
Reserved.
PLL default configuration.
Reserved.
External clock on Pin 33 (40-LFCSP
lead)/Pin 25 (32-LFCSP lead).
Rev. B | Page 48 of 96
Table 49. PLLCON Write Sequence
Name
PLLKEY1
PLLCON
PLLKEY2
POWKEY1 Register
Name:
Address:
Default value:
Access:
Function:
POWKEY2 Register
Name
Address
Default value
Access
Function:
POWCON0 Register
Name:
Address:
Default value:
Access:
Table 50. POWCON0 MMR Bit Designations
Bit
7
6 to 4
3
Value
000
001
010
011
100
Others
Name
PC
POWKEY1
0xFFFF0404
0xXXXX
Write
POWKEY1 prevents accidental
programming to POWCON0.
POWKEY2
0xFFFF040C
0xXXXX
Write
POWKEY2 prevents accidental
programming to POWCON0.
POWCON0
0xFFFF0408
0x00
Read/write
Description
Reserved.
Operating modes.
Active mode.
Pause mode.
Nap.
Sleep mode. IRQ0 to IRQ3 can wake
up the part.
Stop mode. IRQ0 to IRQ3 can wake
up the part.
Reserved.
Reserved.
Code
0xAA
User value
0x55
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