C8051F040-TB Silicon Laboratories Inc, C8051F040-TB Datasheet - Page 94

BOARD PROTOTYPING W/C8051F040

C8051F040-TB

Manufacturer Part Number
C8051F040-TB
Description
BOARD PROTOTYPING W/C8051F040
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F040-TB

Contents
Board
Processor To Be Evaluated
C8051F04x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F040
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
C8051F040/1/2/3/4/5/6/7
7.2.3. Settling Time Requirements
A minimum tracking time is required before an accurate conversion can be performed. This tracking time is
determined by the ADC2 MUX resistance, the ADC2 sampling capacitance, any external source resis-
tance, and the accuracy required for the conversion. Figure 7.3 shows the equivalent ADC2 input circuit.
The required ADC2 settling time for a given settling accuracy (SA) may be approximated by Equation 7.1.
Note: An absolute minimum settling time of 0.8 µs required after any MUX selection. Note that in low-
power tracking mode, three SAR2 clocks are used for tracking at the start of every conversion. For most
applications, these three SAR2 clocks will meet the tracking requirements.
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required settling time in seconds
R
n is the ADC resolution in bits (8).
94
TOTAL
is the sum of the ADC2 MUX resistance and any external source resistance.
Equation 7.1. ADC2 Settling Time Requirements
Figure 7.3. ADC2 Equivalent Input Circuit
AIN2.x
t
=
RC
ln
MUX Select
Input
= R
------ -
SA
2
n
MUX
Rev. 1.5
R
* C
MUX
R
SAMPLE
TOTAL
= 5k
C
SAMPLE
C
SAMPLE
= 10pF

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