MPC8308-RDB Freescale Semiconductor, MPC8308-RDB Datasheet - Page 34

BOARD REF DESIGN MPC8308

MPC8308-RDB

Manufacturer Part Number
MPC8308-RDB
Description
BOARD REF DESIGN MPC8308
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II™ PROr
Type
MPUr

Specifications of MPC8308-RDB

Contents
Board, Cables, Documentation, Power Supply, Software
Ethernet Connection Type
Serial to Ethernet
Data Rate
10 Mbps, 100 Mbps, 1000 Mbps
Memory Type
DDR2, SDRAM
Interface Type
HSSI
Operating Voltage
1.5 V
Operating Current
5 uA
Maximum Power Dissipation
1000 mW
Operating Temperature Range
- 55 C to + 125 C
Product
Modules
For Use With/related Products
MPC8308
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
High-Speed Serial Interfaces (HSSI)
The other detailed AC requirements of the SerDes reference clocks is defined by each interface protocol
based on application usage. For detailed information, see the following sections:
34
At recommended operating conditions with XCOREVDD= 1.0V ± 5%
Rising edge rate (SD_REF_CLK) to falling edge rate
(SD_REF_CLK) matching
Notes:
1. Measurement taken from single ended waveform.
2. Measurement taken from differential waveform.
3. Measured from –200 mV to +200 mV on the differential waveform (derived from SD_REF_CLK minus SD_REF_CLK). The
signal must be monotonic through the measurement region for rise and fall time. The 400 mV measurement window is centered
on the differential zero crossing
4. Matching applies to rising edge rate for SD_REF_CLK and falling edge rate for SD_REF_CLK. It is measured using a 200
mV window centered on the median cross point where SD_REF_CLK rising meets SD_REF_CLK falling. The median cross
point is used to calculate the voltage thresholds the oscilloscope is to use for the edge rate calculations. The Rise Edge Rate
of SD_REF_CLK should be compared to the Fall Edge Rate of SD_REF_CLK, the maximum allowed difference should not
exceed 20% of the slowest edge rate (See
SD_REF_CLK
SD_REF_CLK
V
V
IH
IL
= -200 mV
Section 11.2, “AC Requirements for PCI Express SerDes Clocks”
=
minus
0.0 V
+200
SD_REF_CLK
SD_REF_CLK
Figure 25. Single-Ended Measurement Points for Rise and Fall Time Matching
Figure 24. Differential Measurement Points for Rise and Fall Time
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 2
Table 32. SerDes Reference Clock AC Parameters (continued)
Parameter
(Figure
24).
Figure
25).
SD_REF_CLK
SD_REF_CLK
Matching
Rise-Fall
Symbol
Min
Max
20
Freescale Semiconductor
Unit
%
Notes
1, 4

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