5.07.01 FLASHER ARM Segger Microcontroller Systems, 5.07.01 FLASHER ARM Datasheet - Page 61

PROGRAMMER JTAG FOR ARM CORES

5.07.01 FLASHER ARM

Manufacturer Part Number
5.07.01 FLASHER ARM
Description
PROGRAMMER JTAG FOR ARM CORES
Manufacturer
Segger Microcontroller Systems
Type
In-System Programmerr

Specifications of 5.07.01 FLASHER ARM

Contents
Programmer
For Use With/related Products
ARM7, ARM9, Cortex
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
899-1002
A
Adaptive clocking .................................56
B
Big-endian ..........................................56
C
Cache cleaning ....................................56
Coprocessor ........................................56
D
Dirty data ...........................................56
E
EmbeddedICE .....................................56
H
Halfword .............................................56
Host ...................................................56
I
ICache ...............................................56
ID .....................................................56
IEEE 1149.1 ........................................56
Image ................................................56
Instruction Register ..............................56
IR ......................................................56
J
J-Link
Joint Test Action Group (JTAG) ...............56
JTAG
Flasher ARM (UM08007)
Adapters ..........................................46
Features ...........................................10
Specifications ....................................11
Supported chips .......................... 28, 45
PINs ................................................42
Index
L
Little-endian ....................................... 56
M
Memory coherency .............................. 57
Memory management unit (MMU) ......... 57
Memory Protection Unit (MPU) .............. 57
N
nTRST .......................................... 42, 57
O
Open collector .................................... 57
P
Processor Core ................................... 57
R
Remapping ......................................... 57
RESET ............................................... 57
RTCK ................................................. 57
RTOS ................................................. 57
S
Support ........................................ 51, 55
T
TAP Controller .................................... 57
Target ............................................... 57
TCK .............................................. 42, 57
TDI .............................................. 42, 58
TDO ............................................. 42, 58
Test Access Port (TAP) ......................... 58
Transistor-transistor logic (TTL) ............. 58
W
Word ................................................. 58
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