HS2140EPI61H Renesas Electronics America, HS2140EPI61H Datasheet - Page 195

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HS2140EPI61H

Manufacturer Part Number
HS2140EPI61H
Description
DEV EMULATOR BASE UNIT H8S/2140
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheets

Specifications of HS2140EPI61H

Contents
E6000 Emulator and CD-ROM
For Use With/related Products
H8S/2140
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
7.2 User System Interface
All user system interface signals are directly connected to the MCU in the emulator with no buffering except for
those listed below which are connected to the MCU through control circuits:
• NMI
• RESET
• MD1, MD0
• XTAL
• EXTAL
• WAIT
7.2.1
All user system interface signals are protected from over- or under-voltage by use of diode arrays except for the
AVcc and Vref.
Pull-up resistors are connected to the port signals except for the analog port signals.
The Vcc signals (except for AVcc signals) at the head of the user system interface cable are connected together,
which is monitored by the emulator to detect whether the user system hardware is connected.
7.2.2
The interface circuit between the MCU in the emulator and the user system has a signal delay of about 8 ns due
to the user system interface cable and it includes pull-up resistors. Therefore, high-impedance signals will be
pulled up to the high level. When connecting the emulator to a user system, adjust the user system hardware to
compensate for propagation delays.
Default:
Mode Pins (MD1 and MD0) and NMI: The NMI signal is input to the MCU through the emulator control
circuit. The rising/falling time of these signals must be 8 ns/V or less. The mode pins are only monitored. The
CPU mode depends on the configuration settings of the High-performance Embedded Workshop.
Signal Protection
User System Interface Circuits
Figure 7.2 User System Interface Circuit for MD1, MD0, and NMI
Emulator
control
circuit
Figure 7.1 Default User System Interface Circuit
47 k
Ω
Vcc
47
Ω
User system
interface cable
175

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