OM11024 NXP Semiconductors, OM11024 Datasheet - Page 21

• Manufacturer Part Number: OM11024
• Description: KIT EVAL FOR LPC313X
• Manufacturer: NXP Semiconductors
• Type: Microcontrollerr

Specifications of OM11024

• Contents: 2 Boards, cable and software
• For Use With/related Products: LPC3131
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4719

NXP Semiconductors
LPC3130_3131
Preliminary data sheet
6.13 Multi-layer AHB
The following blocks can generate interrupts:
The multi-layer AHB is an interconnection scheme based on the AHB protocol that
enables parallel access paths between multiple masters and slaves in a system.
Multiple masters can have access to different slaves at the same time.
Figure 5
AHB masters and slaves are numbered according to their AHB port number.
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Visibility of the interrupt’s request state before masking.
Support for nesting of interrupt service routines.
Interrupts routed to IRQ and to FIQ are vectored.
Level interrupt support.
NAND flash controller
USB 2.0 high-speed OTG
Event router
10-bit ADC
UART
LCD
MCI
SPI
I2C0 and I2C1 controllers
Timer0, Timer1, Timer2, and Timer3
I
I
DMA
2
2
S transmit: I2STX_0 and I2STX_1
S receive: I2SRX_0 and I2SRX_1
gives an overview of the multi-layer AHB configuration in the LPC3130/3131.
All information provided in this document is subject to legal disclaimers.
Rev. 1.04 — 27 May 2010
Low-cost, low-power ARM926EJ-S microcontrollers
LPC3130/3131
© NXP B.V. 2010. All rights reserved.
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