Z8018100ZCO Zilog, Z8018100ZCO Datasheet - Page 36

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Z8018100ZCO

Manufacturer Part Number
Z8018100ZCO
Description
Z80181 SAC APPLICATION BOARD
Manufacturer
Zilog
Datasheet

Specifications of Z8018100ZCO

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
Z8018100ZC0
Z8018100ZC0
Zilog
SCC REGISTERS (Continued)
Write Registers
The SCC contains fifteen write registers that are pro-
grammed to configure the operating modes of the chan-
nel. With the exception of WR0, programming the write
registers is a two step operation. The first operation is a
Bit
WR0
WR1
WR2
WR3
WR4
WR5
WR6
WR7
2-36
Read Register 13
D7 D6 D5 D4 D3 D2 D1 D0
Description
Register Pointers, various initialization
commands
Transmit and Receive interrupt enables,
WAIT/DMA commands
Interrupt Vector
Receive parameters and control modes
Transmit and Receive modes and parameters
Transmit parameters and control modes
Sync Character or SDLC address
Sync Character or SDLC flag
(i)
Figure 49. SCC Read Register Bit Functions (Continued)
TC8
TC9
TC10
TC11
TC12
TC13
TC14
TC15
Table 3. SCC Write Registers
PS009701-0301
Upper Byte
of Time Constant
pointer written to WR0 that points to the selected register.
The second operation is the actual control word that is
written into the register to configure the SCC channel
(Figure 50).
Bit
WR8
WR9
WR10 Miscellaneous transmit and receive control bits
WR11 Clock mode controls for receive and transmit
WR12 Lower byte of baud rate generator
WR13 Upper byte of baud rate generator
WR14 Miscellaneous control bits
WR15 External status interrupt enable control
Read Register 15
D7 D6 D5 D4 D3 D2 D1 D0
Description
Transmit buffer
Master Interrupt control and reset commands
(j)
S
MART
A
CCESS
0
Zero Count IE
0
DCD IE
Sync/Hunt IE
CTS IE
Tx Underrun/EOM IE
Break/Abort IE
C
DS971800500
ONTROLLER
Z80181
SAC

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