DSP56F803EVM Freescale Semiconductor, DSP56F803EVM Datasheet - Page 11

KIT EVALUATION FOR DSP56F803

DSP56F803EVM

Manufacturer Part Number
DSP56F803EVM
Description
KIT EVALUATION FOR DSP56F803
Manufacturer
Freescale Semiconductor

Specifications of DSP56F803EVM

Processor To Be Evaluated
56F803
Data Bus Width
16 bit
Interface Type
RS-232, JTAG
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Definitions, Acronyms, and Abbreviations
Definitions, acronyms and abbreviations for terms used in this document are defined below for
reference.
A/D
CAN
CiA
EVM
GPIO
IC
JTAG
LQFP
MPIO
OnCE
PCB
PLL
PWM
RAM
ROM
SCI
SPI
SRAM
UART
Freescale Semiconductor
TM
Analog-to-Digital
Controller Area Network; serial communications peripheral and method
CAN in Automation, an international CAN user’s group that coordinates
standards for CAN communications protocols
Evaluation Module
General Purpose Input and Output Port
Integrated Circuit
Joint Test Action Group, a bus protocol/interface used for test and debug
Low-profile Quad Flat Pack
Multi Purpose Input and Output Port; shares package pins with other
peripherals on the chip and can function as a GPIO
On-Chip Emulation, a debug bus and port created by Freescale to enable
designers to create a low-cost hardware interface for a professional
quality debug environment
Printed Circuit Board
Phase Locked Loop
Pulse Width Modulation
Random Access Memory
Read Only Memory
Serial Communications Interface
Serial Peripheral Interface Port
Static Random Access Memory
Universal Asynchronous Receiver/Transmitter
Preface, Rev. 5
ix

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