DSP56F803EVM Freescale Semiconductor, DSP56F803EVM Datasheet - Page 24
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DSP56F803EVM
Manufacturer Part Number
DSP56F803EVM
Description
KIT EVALUATION FOR DSP56F803
Manufacturer
Freescale Semiconductor
Datasheets
1.CWH-UTP-ONCE-HE.pdf
(2 pages)
2.DSP56F803EVM.pdf
(68 pages)
3.DSP56F803BU80E.pdf
(52 pages)
Specifications of DSP56F803EVM
Processor To Be Evaluated
56F803
Data Bus Width
16 bit
Interface Type
RS-232, JTAG
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
2-8
When this connector is used with an external Host Target Interface, the parallel JTAG
interface should be disabled by placing a jumper in jumper block JG2. Reference
Table 2-4
2.7.2 Parallel JTAG Interface Connector
The Parallel JTAG Interface Connector, P2, allows the 56F803 to communicate with a
Parallel Printer Port on a Windows PC; see
can download programs and work with the 56F803’s registers.
pin-out for this connector. When using the parallel JTAG interface, the jumper at JG2
should be removed; refer to
Host Target Interface to be powered by the Target board instead of the Host system, as
shown in
Table
for this jumper’s selection options.
Table 2-4. Parallel JTAG Interface Disable Jumper Selection
2-6.
Pin #
11
13
1
3
5
7
9
Table 2-3. JTAG Connector Description
No jumper
JG2
1–2
Table
DSP56F803EVM User Manual, Rev. 5
RESET
Signal
+3.3V
2-4. A jumper, JG8, is provided to allow the on-board
TDO
TCK
TDI
NC
NC
On-board Parallel JTAG Interface Enabled
Disable on-board Parallel JTAG Interface
Figure
J1
Pin #
Comment
10
12
14
2
4
6
8
2-5. By using this connector, the user
Signal
TRST
GND
GND
GND
KEY
TMS
NC
Table 2-5
shows the
Freescale Semiconductor