HS7727KCI02H Renesas Electronics America, HS7727KCI02H Datasheet - Page 221

• Manufacturer Part Number: HS7727KCI02H
• Description: ON CHIP DEBUG EMULATOR W/TRACE
• Manufacturer: Renesas Electronics America

Specifications of HS7727KCI02H

• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 6.7 Type Number and AUD Function
Type Number
HS7727KCM01H
HS7727KCM02H
HS7727KCI01H
HS7727KCI02H
Notes: 1. In the internal trace of the SH7727, trace acquisition of the eight latest branch
6.5.4
1.
2.
When JTAG clock (TCK) is used, set the JTAG clock (TCK) frequency to lower than the
frequency of half of the CPU clock.
When the AUD clock (AUDCK) is used, set the AUD clock (AUDCK) within the range
between the quarter of the CPU clock and the CPU clock (60 MHz).
2.
3.
4.
5.
Notes on Using the JTAG Clock (TCK) and AUD Clock (AUDCK)
instructions is available. When the user program execution starts, the following
additional trace is displayed:
In the internal trace of the SH7727, the 4 most significant bits of address values are
not acquired by trace. When the MMU is used, do not use the internal trace. Since
the internal trace acquires only lower 28 bits, a TLB error may occur when the
instruction code is displayed. When the emulator supports the AUD trace function, it
is recommended to use the AUD trace.
For AUD trace, the difference from the previously output branch destination address
is output as the branch destination address, and the difference from the previously
output branch source address is output as the branch source address. If the upper 16
bits of the previously output branch destination/source address are the same, only the
lower 17 bits are output. If the upper 24 bits are the same, only the lower 9 bits are
output. If the upper 28 bits are the same, only the lower 5 bits are output.
From this output difference, the emulator reproduces the 32-bit address and displays it
in the [Trace] window. However, some 32-bit addresses cannot be displayed. In such
cases, the difference from the previously displayed 32-bit address will be displayed.
When cache is ON (enabled), the CPU clock is 33 MHz, and the AUD clock is 30
MHz while Realtime trace is selected, trace information may not be completely
acquired. Note that this phenomenon occurs at the following situation:
When the AUD trace function is used, the AUD clock (AUDCK) in the PCMCIA and
PCI cards does not operate correctly at 60 MHz or more.
Branch source address: Previous user program execution end address
Branch destination address: User program execution start address
9 consecutive NOP instructions are followed by an infinite loop of the BRA
instruction.
AUD Function
Not available
Available
Not available
Available
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