HS7727KCI02H Renesas Electronics America, HS7727KCI02H Datasheet - Page 51

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HS7727KCI02H

Manufacturer Part Number
HS7727KCI02H
Description
ON CHIP DEBUG EMULATOR W/TRACE
Manufacturer
Renesas Electronics America
Datasheets

Specifications of HS7727KCI02H

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
3.6
Check that the destination memory area for downloading is operating correctly.
When the destination memory is SDRAM or DRAM, a register in the bus controller must be set
before downloading. Set the bus controller correctly in the [I/O Registers] window according to
the memory type. For details, refer to section 8.6, I/O Register Display, in the Hitachi Debugging
Interface User’s Manual.
When the required settings, such as the settings for the bus controller, have been completed,
display and edit the contents of the destination memory in the [Memory] window to check that the
memory is operating correctly.
Note: The above way of checking the operation of memory may be inadequate. It is
Select [Memory…] from the [View] menu, enter H’0c000000 in the [Address] edit box, and
set the format in the [Format] combo box to Byte.
Click the [OK] button. The [Memory] window is displayed and shows the specified memory
area.
recommended that a program for checking the memory be created.
Checking the Operation of the Target Memory for Downloading
Figure 3.4 [Open Memory Window] Dialog Box
Figure 3.5 [Memory] Window
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