KP125 EVAL BOARD Infineon Technologies, KP125 EVAL BOARD Datasheet - Page 29

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KP125 EVAL BOARD

Manufacturer Part Number
KP125 EVAL BOARD
Description
BOARD EVALUATION KP125
Manufacturer
Infineon Technologies
Type
Pressure Sensorr
Datasheets

Specifications of KP125 EVAL BOARD

Contents
Fully Assembled Evaluation Board
For Use With/related Products
KP125
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
KP125EVALBOARDIN
Figure 29
Figure 30
Bits 2:0 for the EEPROM mode can have the values shown in
1) TCQ_OFF is updated from EEP during startup.
2) Refer to
3) Only one of the four SET bits (7:4) must be enabled at the same time, otherwise no action will be taken. For those bits only
User’s Manual
bit
9:6
5
4
3:0
bit
9
8
7
6
5
4
3
2:0
write access is allowed (self clearing).
function
CALC_FEC
FEC_OFF
SET_CKB_ODD
SET_CKB_EVEN 0
SET_ZEROS
SET_ONES
PROG_EN
reserved
EEP_MODE
function
TSTMUX_SEL 0
TEST_TC
TCQ_OFF
TSTMD
Chapter 7.4
Address 0x09: TSTCTRL Register
Address 0x0A: EEPCTRL Register
for test mode description.
value
0
1
0
1
0
value
0
1
0
1
0
1
1
0
1
0
1
0
1
0
description
analog test mux select
TempComp normal operation
TempComp test
quadratic coefficients of
TempComp enabled
quadratic coefficients of
TempComp disabled
test mode select
description
no effect
calculate FEC from EEP
registers
FEC enabled
FEC disabled
no effect
set EEP registers to odd
checkerboard pattern
no effect
set EEP registers to even
checkerboard pattern
no effect
set all EEP registers to zero
no effect
set all EEP registers to one
disable EEP programming
enable EEP programming
EEP mode select
(see detailed description of
EEP_MODE bits)
1) 2)
3)
29
Figure
31.
Digital Interface for EEPROM access
Evalkit for Pressure Sensors
remark
see detailed description of
analog test modes
set TC virtually to 125°C
see detailed description of
test mode selection bits
write access only (self
For internal use only
remark
write access only (self
clearing)
result is stored in status
register (FEC_ACT / ERR)
sets odd bits in even rows
and even bits in odd rows to
one, all other bits to zero
sets even bits in even rows
and odd bits in odd rows to
one, all other bits to zero
clearing)
write access only (self
clearing)
Rev. 1.1, 2007-11-23
KP12x Kit

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