PIC16C64A-04/P Microchip Technology, PIC16C64A-04/P Datasheet - Page 318

• Manufacturer Part Number: PIC16C64A-04/P
• Description: IC MCU OTP 2KX14 PWM 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C64A-04/P

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 4MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC16C
• No. Of I/o's: 33
• Ram Memory Size: 128Byte
• Cpu Speed: 4MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Embedded Interface Type: I2C, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 444-1001 - DEMO BOARD FOR PICMICRO MCU
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: PIC16C64A-04/PR; PIC16C64A-04/PR

PIC16C6X
Clearing Interrupts............................................................... 53
Clock Polarity Select bit, CKP ....................................... 85, 90
Clock Polarity, SPI Mode .................................................... 87
Clock Source Select bit, CSRC......................................... 105
Clocking Scheme ................................................................ 18
Code Examples
Code Protection ................................................................ 142
Compare
Computed GOTO ................................................................ 48
Configuration Bits.............................................................. 123
Configuration Word, Diagram............................................ 124
Connecting Two Microcontrollers........................................ 87
Continuous Receive Enable bit, CREN............................. 106
CREN ................................................................................ 106
CSRC ................................................................................ 105
D
D/A ................................................................................ 84, 89
Data/Address bit, D/A.................................................... 84, 89
Data Memory
Data Sheet
DC ....................................................................................... 35
DC CHARACTERISTICS .. 164, 184, 200, 216, 232, 248, 264
Development Support ....................................................... 159
Development Tools ........................................................... 159
Device Drawings
DS30234D-page 318
Changing Between Capture Prescalers...................... 79
Ensuring Interrupts are Globally Disabled ................ 136
Indirect Addressing ..................................................... 49
Initializing PORTA....................................................... 51
Initializing PORTB....................................................... 53
Initializing PORTC....................................................... 55
Loading the SSPBUF Register ................................... 86
Loading the SSPBUF register..................................... 91
Reading a 16-bit Free-running Timer.......................... 73
Read-Modify-Write on an I/O Port............................... 60
Saving Status, W, and PCLATH Registers ............... 139
Subroutine Call, Page0 to Page1................................ 49
Block Diagram............................................................. 79
Mode ........................................................................... 79
Pin Configuration ........................................................ 79
Software Interrupt ....................................................... 79
Special Event Trigger.................................................. 79
Organization................................................................ 20
Section ........................................................................ 20
Compatibility ............................................................. 307
Modifications ............................................................. 307
What’s New............................................................... 308
18-Lead Ceramic CERDIP Dual In-line
with Window (300 mil) ............................................... 296
18-Lead Plastic Dual In-line (300 mil) ....................... 291
18-Lead Plastic Surface Mount
(SOIC - Wide, 300 mil Body).................................... 294
28-Lead Ceramic CERDIP Dual In-line with
Window (300 mil)) ..................................................... 297
28-Lead Ceramic Side Brazed Dual In-Line
with Window (300 mil) ............................................... 299
28-Lead Plastic Dual In-line (300 mil) ....................... 292
28-Lead Plastic Surface Mount
(SOIC - Wide, 300 mil Body)..................................... 295
28-Lead Plastic Surface Mount
(SSOP - 209 mil Body 5.30 mm)............................... 300
40-Lead Ceramic CERDIP Dual In-line
with Window (600 mil) ............................................... 298
40-Lead Plastic Dual In-line (600 mil) ....................... 293
44-Lead Plastic Leaded Chip Carrier (Square)......... 301
Device Varieties.................................................................... 7
Digit Carry............................................................................. 9
Digit Carry bit ...................................................................... 35
Direct Addressing ............................................................... 49
E
Electrical Characteristics .. 163, 183, 199, 215, 231, 247, 263
External Clock Synchronization, TMR0 .............................. 67
F
Family of Devices
FERR ................................................................................ 106
Framing Error bit, FERR ................................................... 106
FSR......................... 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34
Fuzzy Logic Dev. System ( fuzzy TECH -MP)........... 159, 161
G
General Description .............................................................. 5
General Purpose Registers ................................................ 20
GIE...................................................................................... 37
Global Interrupt Enable bit, GIE.......................................... 37
Graphs
H
High Baud Rate Select bit, BRGH .................................... 105
I
I/O Ports, Section................................................................ 51
I
2
C
44-Lead Plastic Surface Mount (MQFP
10x10 mm Body 1.6/0.15 mm Lead Form) ....... 302, 303
PIC12CXXX.............................................................. 309
PIC14C000 ............................................................... 309
PIC16C15X............................................................... 310
PIC16C55X............................................................... 311
PIC16C5X................................................................. 310
PIC16C62X and PIC16C64X.................................... 311
PIC16C6X..................................................................... 6
PIC16C7XX .............................................................. 312
PIC16C8X................................................................. 313
PIC16C9XX .............................................................. 313
PIC17CXX ................................................................ 314
PIC16C6X................................................................. 281
PIC16C61 ................................................................. 173
Addressing................................................................ 100
Addressing I
Arbitration ................................................................... 98
Block Diagram ............................................................ 99
Clock Synchronization ................................................ 98
Combined Format....................................................... 97
I
I
Initiating and Terminating Data Transfer .................... 95
Master Mode............................................................. 103
Master-Receiver Sequence ........................................ 97
Master-Transmitter Sequence .................................... 97
Mode........................................................................... 99
Mode Selection........................................................... 99
Multi-master................................................................ 98
Multi-Master Mode.................................................... 103
Reception ................................................................. 101
Reception Timing Diagram ....................................... 101
SCL and SDA pins.................................................... 100
Slave Mode............................................................... 100
START........................................................................ 95
STOP.................................................................... 95, 96
2
2
C Operation.............................................................. 99
C Overview .............................................................. 95
2
C Devices.............................................. 96
1997 Microchip Technology Inc.