PIC16C64A-04/P Microchip Technology, PIC16C64A-04/P Datasheet - Page 68

IC MCU OTP 2KX14 PWM 40DIP

PIC16C64A-04/P

Manufacturer Part Number
PIC16C64A-04/P
Description
IC MCU OTP 2KX14 PWM 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C64A-04/P

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
4MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC16C
No. Of I/o's
33
Ram Memory Size
128Byte
Cpu Speed
4MHz
No. Of Timers
3
No. Of Pwm Channels
1
Embedded Interface Type
I2C, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
444-1001 - DEMO BOARD FOR PICMICRO MCU
Eeprom Size
-
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC16C64A-04/PR
PIC16C64A-04/PR

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PIC16C6X
7.3
An 8-bit counter is available as a prescaler for the
Timer0 module or as a postscaler for the Watchdog
Timer (WDT), respectively (Figure 7-6). For simplicity,
this counter is being referred to as “prescaler” through-
out this data sheet. Note that the prescaler may be
used by either the Timer0 module or the Watchdog
Timer, but not both. Thus, a prescaler assignment for
the Timer0 module means that there is no prescaler for
the Watchdog Timer, and vice-versa.
FIGURE 7-6:
DS30234D-page 68
Applicable Devices
61 62 62A R62 63 R63 64 64A R64 65 65A R65 66 67
RA4/T0CKI
CLKOUT (=Fosc/4)
WDT Enable bit
pin
Watchdog
Timer
Prescaler
Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION<5:0>).
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
T0SE
0
1
PSA
M
U
X
0
1
T0CS
M
U
X
0
8-bit Prescaler
8 - to - 1MUX
Time-out
8
M U X
WDT
1
0
1
PSA
M
U
X
The PSA and PS2:PS0 bits (OPTION<3:0>) determine
the prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing to the TMR0 register (e.g. CLRF
MOVWF TMR0, BSF TMR0,bitx) will clear the pres-
caler count. When assigned to the Watchdog Timer, a
CLRWDT instruction will clear the Watchdog Timer and
the prescaler count. The prescaler is not readable or
writable.
Note:
PSA
PS2:PS0
Cycles
SYNC
Writing to TMR0 when the prescaler is
assigned to Timer0 will clear the prescaler
count, but will not change the prescaler
assignment.
2
1997 Microchip Technology Inc.
TMR0 reg
Data Bus
8
Set flag bit T0IF
on Overflow
TMR0,

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