DSPIC30F6014A-20E/PT Microchip Technology, DSPIC30F6014A-20E/PT Datasheet - Page 152

• Manufacturer Part Number: DSPIC30F6014A-20E/PT
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6014A-20E/PT

• Program Memory Type: FLASH
• Program Memory Size: 144KB (48K x 24)
• Package / Case: 80-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 68
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
• Minimum Operating Temperature: - 40 C
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPDM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC30F007 - MODULE SKT FOR DSPIC30F 80TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC30F6011A/6012A/6013A/6014A
REGISTER 20-3:
DS70143E-page 152
bit 23
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 23-16
bit 15-14
bit 13-11
bit 10-8
bit 7-5
bit 4-0
R/P
U-0
U-0
—
—
FCKSM<1:0>
Unimplemented: Read as ‘0’
FCKSM<1:0>: Clock Switching and Monitor Selection Configuration bits
1x = Clock switching is disabled, fail safe clock monitor is disabled
01 = Clock switching is enabled, fail safe clock monitor is disabled
00 = Clock switching is enabled, fail safe clock monitor is enabled
Unimplemented: Read as ‘0’
FOS<2:0>: Oscillator Group Selection on POR bits
111 = PLL Oscillator; PLL source selected by FPR<4:0> bits, see
011 = EXT: External Oscillator; OSC1/OSC2 pins; External Oscillator configuration selected by
010 = LPRC: Internal Low Power RC
001 = FRC: Internal Fast RC
000 = LPOSC: Low Power Crystal Oscillator; SOSCI/SOSCO pins
Unimplemented: Read as ‘0’
FPR<4:0>: Oscillator Selection within Primary Group bits, see
U-0
R/P
U-0
—
—
FOSC: OSCILLATOR CONFIGURATION REGISTER
FPR<4:0> bits
W = Writable bit
‘1’ = Bit is set
U-0
U-0
U-0
—
—
—
R/P
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
R/P
—
—
FPR<4:0>
Table
U-0
R/P
R/P
—
Table
20-2.
© 2011 Microchip Technology Inc.
20-2.
x = Bit is unknown
FOS<2:0>
U-0
R/P
R/P
—
R/P
R/P
U-0
—
bit 16
bit 8
bit 0