DSPIC30F6014A-20E/PT Microchip Technology, DSPIC30F6014A-20E/PT Datasheet - Page 223

• Manufacturer Part Number: DSPIC30F6014A-20E/PT
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6014A-20E/PT

• Program Memory Type: FLASH
• Program Memory Size: 144KB (48K x 24)
• Package / Case: 80-TFQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 68
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
• Minimum Operating Temperature: - 40 C
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPDM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC30F007 - MODULE SKT FOR DSPIC30F 80TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

APPENDIX A:
Revision A (January 2005)
Original data sheet for dsPIC30F6011A, 6012A, 6013A
and 6014A devices.
Revision B (September 2005)
Revision B of this data sheet reflects these changes:
• 12-Bit ADC allows up to 200 ksps sampling rate
• FRC Oscillator revised to allow tuning in ±0.75%
• Revised electrical characteristics:
Revision C (October 2006)
Revision C of this data sheet reflects these changes:
• BSRAM and SSRAM SFRs added for Data RAM
• Added INTTREG register (see
• Revised I
• Base Instruction CP1 removed from instruction
• Revised electrical characteristics:
© 2011 Microchip Technology Inc.
(see
sion Clock”
increments (see
lator (FRC)”
- Operating Current (I
- Idle Current (I
- Power-Down Current (I
- Brown-Out Reset (BOR) (see
- External Clock Timing Requirements (see
- PLL Clock Timing Specification (V
- PLL Jitter
- Internal FRC Jitter Accuracy and Drift (see
- 12-Bit ADC Module Specifications (see
- 12-Bit ADC Conversion Timing Requirements
protection (see
tion
“Interrupts”)
set (see
- Operating Current (I
- Idle Current (I
- Power-Down Current (I
- I/O Pin Input Specifications (see
- Brown-Out Reset (BOR) (see
- Watchdog Timer (see
Table
5.5 V) (see
Table
Table
(see
Feature”)
Section 19.6 “Selecting the ADC Conver-
Table
23-14)
23-18)
23-38)
Table
2
C Slave Addresses (see
(seeTable
and
and
23-39)
Table
21-2)
Section 3.2.7 “Data Ram Protec-
IDLE
IDLE
Section 20.2.5 “Fast RC Oscil-
Section 19.7 “ADC
Table
23-15)
) (see
) (see
REVISION HISTORY
dsPIC30F6011A/6012A/6013A/6014A
DD
DD
23-16)
20-4).
Table
) (see
) (see
PD
PD
Table
Table
)
)
(seeTable
(seeTable
23-21)
Section 5.0
Table
Table
Table
Table
23-6)
23-6)
Table
Table
DD
23-5)
23-5)
Speeds”),
23-11)
23-11)
= 2.5-
23-7)
23-7)
23-8)
15-1)
Revision D (March 2008)
This revision reflects these updates:
• Added FUSE Configuration Register (FICD)
• Removed erroneous statement regarding genera-
• Electrical Specifications:
• Preliminary marking removed from document
• Additional minor corrections throughout the
details (see
Registers”
tion of CAN receive errors (see
“Receive
- Resolved TBD values for parameters DO10,
- 10-bit High-Speed ADC t
- Parameter OS65 (Internal RC Accuracy) has
- Parameter DC12 (RAM Data Retention Volt-
- Parameter D134 (Erase/Write Cycle Time)
- Removed parameters OS62 (Internal FRC
- Parameter OS63 (Internal FRC Accuracy)
- Updated I/O Pin characteristics parameters
- Removed parameters DC27a, DC27b,
- Removed parameters CS77 and CS78
- Updated Min and Max values and Conditions
footer
document
DO16, DO20, and DO26 (see
ter (time to stabilize) has been updated from
20 µs typical to 20 µs maximum (see
Table
been expanded to reflect multiple Min and
Max values for different temperatures (see
Table
age) has been updated to include a Min value
(see
has been updated to include Min and Max
values and the Typ value has been removed
(see
Jitter) and OS64 (Internal FRC Drift) and
Note 2 from AC Characteristics (see
Table
has been expanded to reflect multiple Min
and Max values for different temperatures
(see
DI19 and DI29 (see
DC47a, and DC47b (references to I
MIPs @ 3.3V) in
(references to T
Table 23-30
for parameter SY11 and updated Min, Typ,
and Max values and Conditions for parame-
ter SY20 (see
Table
Table
Table
23-39)
23-19)
23-18)
Errors”)
Section 20.8 “Device Configuration
and
23-4)
23-12)
23-18)
Table
Table
FACL
Table 23-5
20-8)
Table
23-21)
and T
PDU
23-8)
RACL
and
timing parame-
Section 17.4.5
Table
DS70143E-page 223
@ 3.3V) in
Table 23-6
DD
23-9)
, 20