ST7FLI49MK1T6 STMicroelectronics, ST7FLI49MK1T6 Datasheet - Page 16

• Manufacturer Part Number: ST7FLI49MK1T6
• Description: MCU 8BIT SGL VOLT FLASH 32-LQFP
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLI49MK1T6

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Processor Series: ST7FLI4x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 384 B
• Interface Type: I2C
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Pin description
Table 2.
1. In the open-drain output column, T defines a true open-drain I/O (P-Buffer and protection diode to V
2. It is mandatory to connect all available V
16/188
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
number
implemented).
Pin
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
PA2 (HS)/ATPWM0
Device pin description
PB1/AIN1/CLKIN
PA1 (HS)/ATIC
PC2/ICCDATA
PC3/ICCCLK
PC7/BREAK
Pin name
PB0/AIN0
PB2/AIN2
PB3/AIN3
PB4/AIN4
PB5/AIN5
PB6/AIN6
PB7/AIN7
PC0/AIN8
PC1/AIN9
PC4/LTIC
PA0 (HS)
PC5
PC6
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DD
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
and V
Level
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
DDA
HS
HS
HS
Doc ID 13562 Rev 3
pins to the supply voltage and all V
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
Input
ei1
ei2
ei2
ei0
Port/control
x
x
x
x
x
x
x
x
x
x
Output
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
SS
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
and V
function
Port B0
Port B1
Port B2
Port B3
Port B4
Port B5
Port B6
Port B7
Port C0
Port C1
Port C2
Port C3
Port C4
Port C7
Port A1
Port A2
SSA
reset)
(after
Main
(HS)
(HS)
DD
pins to ground.
Port A0 (HS)
are not
Port C5
Port C6
ST7LITE49M
clock source
Alternate
ICCDATA
ATPWM0
function
External
ICCCLK
BREAK
AIN1/
AIN0
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
AIN9
ATIC
LTIC