Z8F012ASB020SG Zilog, Z8F012ASB020SG Datasheet - Page 42

• Manufacturer Part Number: Z8F012ASB020SG
• Description: IC ENCORE XP MCU FLASH 1K 8SOIC
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F012ASB020SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 16 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: Z8F012Ax
• Core: eZ8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z8F04A08100KITG, Z8F04A28100KITG, ZENETSC0100ZACG, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZAC, ZUSBSC00100ZACG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4039; Z8F012ASB020SG

Table 11. Reset Status Register (RSTSTAT)
BITS
FIELD
RESET
R/W
ADDR
PS022825-0908
Reset or Stop Mode Recovery Event
Power-On Reset
Reset using RESET pin assertion
Reset using Watchdog Timer time-out
Reset using the On-Chip Debugger (OCTCTL[1] set to 1)
Reset from STOP Mode using DBG Pin driven Low
Stop Mode Recovery using GPIO pin transition
Stop Mode Recovery using Watchdog Timer time-out
POR
R
7
POR—Power-On Reset Indicator
If this bit is set to 1, a Power-On Reset event occurs. This bit is reset to 0 if a WDT
time-out or Stop Mode Recovery occurs. This bit is also reset to 0 when the register is
read.
STOP—Stop Mode Recovery Indicator
If this bit is set to 1, a Stop Mode Recovery occurs. If the STOP and WDT bits are both set
to 1, the Stop Mode Recovery occurs because of a WDT time-out. If the STOP bit is 1 and
the WDT bit is 0, the Stop Mode Recovery was not caused by a WDT time-out. This bit is
reset by a Power-On Reset or a WDT time-out that occurred while not in STOP mode.
Reading this register also resets this bit.
WDT—Watchdog Timer Time-Out Indicator
If this bit is set to 1, a WDT time-out occurs. A POR resets this pin. A Stop Mode Recov-
ery from a change in an input pin also resets this bit. Reading this register resets this bit.
This read must occur before clearing the WDT interrupt.
EXT—External Reset Indicator
If this bit is set to 1, a Reset initiated by the external RESET pin occurs. A Power-On
Reset or a Stop Mode Recovery from a change in an input pin resets this bit. Reading this
register resets this bit.
Reserved—Must be 0.
LVD—Low Voltage Detection Indicator
If this bit is set to 1 the current state of the supply voltage is below the low voltage
detection threshold. This value is not latched but is a real-time indicator of the supply volt-
age level.
See descriptions below
STOP
R
6
WDT
R
5
EXT
R
4
0
Reset, Stop Mode Recovery, and Low Voltage Detection
FF0H
R
3
0
POR
Z8 Encore! XP
Reserved
1
0
0
1
1
0
0
R
2
0
STOP
Product Specification
0
0
0
0
0
1
1
R
1
0
®
WDT
F082A Series
0
0
1
0
0
0
1
LVD
EXT
R
0
0
0
1
0
0
0
0
0
31