R5F21356CNFP#U0 Renesas Electronics America, R5F21356CNFP#U0 Datasheet - Page 140

MCU 1KB FLASH 32K ROM 52-LQFP

R5F21356CNFP#U0

Manufacturer Part Number
R5F21356CNFP#U0
Description
MCU 1KB FLASH 32K ROM 52-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/35Cr
Datasheet

Specifications of R5F21356CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
47
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Manufacturer:
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Manufacturer:
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Quantity:
10 000
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Part Number:
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Manufacturer:
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R8C/35C Group
REJ09B0567-0100 Rev.1.00 Dec. 14, 2009
Page 107 of 725
Table 7.43
X: 0 or 1
Notes:
Table 7.44
X: 0 or 1
Notes:
Table 7.45
X: 0 or 1
Notes:
Table 7.46
Notes:
Table 7.47
X: 0 or 1
Notes:
Register
Register
Register
Register
Register
Setting
Setting
Setting
Setting
Setting
Value
Value
Value
Value
Value
Bit
Bit
Bit
Bit
Bit
1. Pulled up by setting the PU13 bit in the PUR1 register to 1.
2. Output drive capacity high by setting the DRR13 bit in the DRR1 register to 1.
1. Pulled up by setting the PU13 bit in the PUR1 register to 1.
2. Output drive capacity high by setting the DRR13 bit in the DRR1 register to 1.
1. Pulled up by setting the PU14 bit in the PUR1 register to 1.
2. Output drive capacity high by setting the DRR14 bit in the DRR1 register to 1.
1. Pulled up by setting the PU14 bit in the PUR1 register to 1.
2. Output drive capacity high by setting the DRR14 bit in the DRR1 register to 1.
1. Pulled up by setting the PU14 bit in the PUR1 register to 1.
2. Output drive capacity high by setting the DRR14 bit in the DRR1 register to 1.
PD6_2
PD6
0
1
0
X
PD5_6
PD5_7
PD6_0
PD6_1
PD5
PD5
PD6
PD6
Port P5_6/TRAO
Port P6_0/TREO
Port P6_2/CLK1
Port P5_7
Port P6_1
X
X
0
1
0
1
0
1
0
1
CLK1SEL1 CLK1SEL0
Other than 10b
Other than 10b
1
1
Input port
Output port
Input port
Output port
U1SR
TRAOSEL1
TREOSEL0
TIMSR
1
1
(1)
(1)
0
0
Other than 10b
Other than 10b
Other than 11b
Other than 11b
(2)
(2)
TRASR
Function
Function
SMD2
X
X
X
0
TRAOSEL0
TRECR1
TOENA
0
1
SMD1
X
X
X
0
U1MR
Input port
Output port
TREO output
SMD0
TRAIOC
TOENA
X
X
X
1
X
X
1
(1)
(2)
(2)
CKDIR
X
X
Function
1
0
Input port
Output port
TRAO output
Input port
Output port
CLK1 (external clock) input
CLK1 (internal clock) output
(1)
(2)
(1)
Function
(1)
(2)
Function
7. I/O Ports
(1)
(2)

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