R5F21356CNFP#U0 Renesas Electronics America, R5F21356CNFP#U0 Datasheet - Page 420

MCU 1KB FLASH 32K ROM 52-LQFP

R5F21356CNFP#U0

Manufacturer Part Number
R5F21356CNFP#U0
Description
MCU 1KB FLASH 32K ROM 52-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/3x/35Cr
Datasheet

Specifications of R5F21356CNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
47
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/35C Group
REJ09B0567-0100 Rev.1.00 Dec. 14, 2009
Page 387 of 725
20.7.11 Timer RD Interrupt Enable Register i (TRDIERi) (i = 0 or 1) in Complementary
After Reset
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 0144h (TRDIER0), 0154h (TRDIER1)
Symbol
Symbol
Bit
IMIEA
IMIEB
IMIEC
IMIED
OVIE
PWM Mode
b7
1
Input capture/compare match interrupt
enable bit A
Input capture/compare match interrupt
enable bit B
Input capture/compare match interrupt
enable bit C
Input capture/compare match interrupt
enable bit D
Overflow/underflow interrupt enable
bit
Nothing is assigned. If necessary, set to 0. When read, the content is 1.
b6
1
Bit Name
b5
1
OVIE
b4
0
0: Disable interrupt (IMIA) by the IMFA bit
1: Enable interrupt (IMIA) by the IMFA bit
0: Disable interrupt (IMIB) by the IMFB bit
1: Enable interrupt (IMIB) by the IMFB bit
0: Disable interrupt (IMIC) by the IMFC bit
1: Enable interrupt (IMIC) by the IMFC bit
0: Disable interrupt (IMID) by the IMFD bit
1: Enable interrupt (IMID) by the IMFD bit
0: Disable interrupt (OVI) by the OVF or UDF bit
1: Enable interrupt (OVI) by the OVF or UDF bit
IMIED
b3
0
IMIEC
b2
0
Function
IMIEB
b1
0
IMIEA
b0
0
20. Timer RD
R/W
R/W
R/W
R/W
R/W
R/W

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