R5F21356CNFP#U0 Renesas Electronics America, R5F21356CNFP#U0 Datasheet - Page 402

• Manufacturer Part Number: R5F21356CNFP#U0
• Description: MCU 1KB FLASH 32K ROM 52-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/3x/35Cr

Specifications of R5F21356CNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 47
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/35C Group
REJ09B0567-0100 Rev.1.00 Dec. 14, 2009
Page 369 of 725
20.6.6
Notes:
After Reset
1. Set bits CMD1 to CMD0 when both the TSTART0 and TSTART1 bits are set to 0 (count stops).
2. When bits CMD1 to CMD0 are set to 00b (timer mode, PWM mode, or PWM3 mode), the setting of the PWM3 bit
Bit
b0
b1
b2
b3
b4
b5
b6
b7
Address 013Ah
is enabled.
Symbol
ADTRG
Symbol
STCLK
Bit
PWM3
CMD0
CMD1
ADEG
OLS0
OLS1
Timer RD Function Control Register (TRDFCR) in Reset Synchronous
PWM Mode
PWM3
b7
1
Combination mode select bit
Normal-phase output level select bit
(in reset synchronous PWM mode or
complementary PWM mode)
Counter-phase output level select bit
(in reset synchronous PWM mode or
complementary PWM mode)
A/D trigger enable bit
(in complementary PWM mode)
A/D trigger edge select bit
(in complementary PWM mode)
External clock input select bit
PWM3 mode select bit
STCLK
b6
0
Bit Name
ADEG
b5
0
(2)
ADTRG
(1)
b4
0
OLS1
Set to 01b (reset synchronous PWM mode) in
reset synchronous PWM mode.
0: Initial output “H”, Active level “L”
1: Initial output “L”, Active level “H”
This bit is disabled in reset synchronous PWM
mode.
0: External clock input disabled
1: External clock input enabled
This bit is disabled in reset synchronous PWM
mode.
b3
0
OLS0
b2
0
CMD1
Function
b1
0
CMD0
b0
0
20. Timer RD
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W