HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 456

• Manufacturer Part Number: HD6413003TF16V
• Description: MCU 5V 0K PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413003TF16V

• Core Size: 16-Bit
• Oscillator Type: Internal
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• No. Of Timers: 11
• No. Of Pwm Channels: 4
• Digital Ic Case Style: QFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit 2—Transmit-End Interrupt Enable (TEIE): Enables or disables the transmit-end interrupt
(TEI) requested if TDR does not contain new transmit data when the MSB is transmitted.
Bit 2
TEIE
0
1
Note: * TEI interrupt requests can be cleared by reading the value 1 from the TDRE flag in SSR,
Bits 1 and 0—Clock Enable 1 and 0 (CKE1/0): These bits select the SCI clock source and
enable or disable clock output from the SCK pin. Depending on the settings of CKE1 and CKE0,
the SCK pin can be used for generic input/output, serial clock output, or serial clock input.
The CKE0 setting is valid only in asynchronous mode, and only when the SCI is internally
clocked (CKE1 = 0). The CKE0 setting is ignored in synchronous mode, or when an external
clock source is selected (CKE1 = 1). Set the CKE1 and CKE0 bits after selecting the SCI
operating mode in SMR. For further details on selection of the SCI clock source, see table 13-9 in
section 13.3, Operation.
Bit 1
CKE1
0
0
1
1
Notes: 1. Initial value
then clearing the TDRE flag to 0, thereby also clearing the TEND flag to 0; or by clearing
the TEIE bit to 0.
2. The output clock frequency is the same as the bit rate.
3. The input clock frequency is 16 times the bit rate.
Description
Transmit-end interrupt requests (TEI) are disabled*
Transmit-end interrupt requests (TEI) are enabled*
Bit 0
CKE0
0
1
0
1
Description
Asynchronous mode
Synchronous mode
Asynchronous mode
Synchronous mode
Asynchronous mode
Synchronous mode
Asynchronous mode
Synchronous mode
Internal clock, SCK pin available for generic
input/output
Internal clock, SCK pin used for serial clock output
Internal clock, SCK pin used for clock output
Internal clock, SCK pin used for serial clock output
External clock, SCK pin used for clock input
External clock, SCK pin used for serial clock input
External clock, SCK pin used for clock input
External clock, SCK pin used for serial clock input
436
*1
(Initial value)
*3
*3
*2
*1