HD6413003TF16V Renesas Electronics America, HD6413003TF16V Datasheet - Page 461

• Manufacturer Part Number: HD6413003TF16V
• Description: MCU 5V 0K PB-FREE 112-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD6413003TF16V

• Core Size: 16-Bit
• Oscillator Type: Internal
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 16MHz
• No. Of Timers: 11
• No. Of Pwm Channels: 4
• Digital Ic Case Style: QFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit 1—Multiprocessor Bit (MPB): Stores the value of the multiprocessor bit in receive data
when a multiprocessor format is used in asynchronous mode. MPB is a read-only bit and cannot
be written.
Bit 1
MPB
0
1
Note: * If the RE bit is cleared to 0 when a multiprocessor format is selected, MPB retains its
Bit 0—Multiprocessor Bit Transfer (MPBT): Stores the value of the multiprocessor bit added to
transmit data when a multiprocessor format is selected for transmitting in asynchronous mode.
The MPBT setting is ignored in synchronous mode, when a multiprocessor format is not selected,
or when the SCI is not transmitting.
Bit 0
MPBT
0
1
13.2.8 Bit Rate Register (BRR)
BRR is an 8-bit register that, together with the CKS1 and CKS0 bits in SMR that select the baud
rate generator clock source, determines the serial communication bit rate.
The CPU can always read and write BRR. BRR is initialized to H'FF by a reset and in standby
mode. The two SCI channels have independent baud rate generator control, so different values can
be set in the two channels.
Table 13-3 shows examples of BRR settings in asynchronous mode. Table 13-4 shows examples
of BRR settings in synchronous mode.
Bit
Initial value
Read/Write
previous value.
Description
Multiprocessor bit value in receive data is 0*
Multiprocessor bit value in receive data is 1
Description
Multiprocessor bit value in transmit data is 0
Multiprocessor bit value in transmit data is 1
R/W
7
1
R/W
6
1
R/W
5
1
441
R/W
4
1
R/W
3
1
R/W
2
1
R/W
1
1
(Initial value)
(Initial value)
R/W
0
1