HD6473834HV Renesas Electronics America, HD6473834HV Datasheet - Page 256

• Manufacturer Part Number: HD6473834HV
• Description: MCU 5V 32K PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD6473834HV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: SCI
• Peripherals: LCD, PWM
• Number Of I /o: 71
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 4: SOL
0
1
Bit 3—Overrun Error Flag (ORER): When an external clock is used, bit 3 indicates the
occurrence of an overrun error. If a clock pulse is input after transfer completion, this bit is set to 1
indicating an overrun. If noise occurs during a transfer, causing an extraneous pulse to be
superimposed on the normal serial clock, incorrect data may be transferred. Overrun errors are not
detected while pin CS is at the high level.
Bit 3: ORER
0
1
Bit 2—Wait Flag (WT): Bit 2 indicates that an attempt was made to read or write the 32-byte
serial data buffer while a transfer was in progress, or while waiting for CS input. The read or write
access is not carried out, and this bit is set to 1.
Bit 2: WT
0
1
Bit 1—Abort Flag (ABT): Bit 1 indicates that CS went to high during data transfer. When the CS
input function is selected, if a high-level signal is detected at pin CS during a transfer, the transfer
is immediately aborted and this bit is set to 1. At the same time bit IRRS2 in interrupt request
register 2 (IRR2) is set
to 1, and pins SCK
buffer and values in the internal registers other than SCSR2 remain unchanged.
Transfer cannot take place while this bit is set to 1. It must be cleared to 0 before resuming the
transfer.
2
Description
Read: SO
Write: SO
Read: SO
Write: SO
Description
Clearing conditions:
After reading ORER = 1, cleared by writing 0 to ORER
Setting conditions:
Set if a clock pulse is input after transfer is complete, when an external clock is
used
Description
Clearing conditions:
After reading WT = 1, cleared by writing 0 to WT
Setting conditions:
An attempt was made to read or write the (32-byte) serial data buffer during a
transfer operation or while waiting for CS input
and SO
2
go to the high-impedance state. Data in the (32-byte) serial data
2
2
2
2
pin output level changes to low
pin output level changes to high
pin output level is low
pin output level is high
(initial value)
(initial value)
(initial value)
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