HD6473834HV Renesas Electronics America, HD6473834HV Datasheet - Page 285

• Manufacturer Part Number: HD6473834HV
• Description: MCU 5V 32K PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD6473834HV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: SCI
• Peripherals: LCD, PWM
• Number Of I /o: 71
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Table 10.14 SMR and SCR3 Settings and Clock Source Selection
SMR
Bit 7:
COM
0
1
0
1
1
Continuous Transmit/Receive Operation Using Interrupts: Continuous transmit and receive
operations are possible with SCI3, using the RXI or TXI interrupts. Table 10.15 explains this use
of these interrupts.
Table 10.15 Transmit/Receive Interrupts
Interrupt
RXI
TXI
TEI
268
Bit 1:
CKE1
0
1
0
1
1
1
1
Flag
RDRF
RIE
TDRE
TIE
TEND
TEIE
SCR3
Bit 0:
CKE0
0
1
0
0
0
1
0
1
Interrupt Conditions
When serial data is received normally
and receive data is transferred from
RSR to RDR, RDRF is set to 1. If RIE
is 1 at this time, RXI is enabled and an
interrupt occurs. (See figure
10.8 (a).)
When TSR empty (previous trans-
mission complete) is detected and the
transmit data set in TDR is transferred
to TSR, TDRE is set to 1. If TIE is 1 at
this time, TXI is enabled and an
interrupt occurs. (See figure 10.8 (b).)
When the last bit of the TSR transmit
character has been sent, if TDRE is 1,
then 1 is set in TEND. If TEIE is 1 at
this time, TEI is enabled and an
interrupt occurs. (See figure 10.8 (c).)
Mode
Asynchronous
mode
Synchronous
mode
Reserved
Clock
Source
Internal
External
Internal
External
(illegal settings)
Pin SCK
I/O port (SCK
Outputs clock with same frequency as
bit rate
Clock should be input with frequency
16 times the desired bit rate
Outputs a serial clock
Inputs a serial clock
Transmit/Receive Clock
Remarks
The RXI interrupt handler routine
should read the receive data from
RDR and clear RDRF to 0.
Continuous receiving is possible if
these operations are completed
before the next data has been
completely received in RSR.
The TXI interrupt handler routine
should write the next transmit data
to TDR and clear TDRE to
0.Continuous transmission is
possible if these operations are
completed before the data
transferred to TSR has been
completely transmitted.
TEI indicates that, when the last bit
of the TSR transmit character was
sent, the next transmit data had
not been written to TDR.
3
Function
3
function not used)