HD6417032F20V Renesas Electronics America, HD6417032F20V Datasheet - Page 95

SH1 ROMLESS LEAD FREE

HD6417032F20V

Manufacturer Part Number
HD6417032F20V
Description
SH1 ROMLESS LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417032F20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Manufacturer
Quantity
Price
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TI
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Manufacturer:
RENESAS
Quantity:
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5.1
The interrupt controller (INTC) determines the priority of interrupt sources and controls interrupt
requests to the CPU. INTC has registers for assigning priority levels to interrupt sources. These
registers handle interrupt requests according to user-specified priorities.
5.1.1
The interrupt controller has the following features:
5.1.2
Figure 5.1 shows a block diagram of the interrupt controller.
16 settable priority levels: Five interrupt priority registers can set 16 levels of interrupt
priorities for IRQ and on-chip supporting module interrupt sources.
NMI noise canceller function: INTC has an NMI input level bit that indicates the NMI pin
status. By reading this bit in the interrupt exception handling routine, the pin status can be
checked for use in a noise canceller function.
The interrupt controller can notify external devices (via the IRQOUT pin) that an on-chip
interrupt has occurred. In this way an external device can, for example, be informed if an on-
chip interrupt occurs while the chip is operating in bus-released mode and the bus has been
requested.
Features
Block Diagram
Overview
Section 5 Interrupt Controller (INTC)
Rev. 7.00 Jan 31, 2006 page 67 of 658
Section 5 Interrupt Controller (INTC)
REJ09B0272-0700

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