AT91SAM7SE512-AU Atmel, AT91SAM7SE512-AU Datasheet - Page 446

• Manufacturer Part Number: AT91SAM7SE512-AU
• Description: IC ARM7 MCU FLASH 512K 128-LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7SE512-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: EBI/EMI, I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 88
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 128-LQFP
• Cpu Family: 91S
• Device Core: ARM7TDMI
• Device Core Size: 32b
• Frequency (max): 55MHz
• Interface Type: EBI/SPI/TWI/USART
• Total Internal Ram Size: 32KB
• # I/os (max): 88
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 128
• Package Type: LQFP
• No. Of I/o's: 88
• Ram Memory Size: 32KB
• Cpu Speed: 48MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 4
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM7S-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7SE-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM7SE-EK - EVAL BOARD FOR AT91SAM7SEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

34.6
Table 34-2.
446
Offset
0x0000
0x0004
0x0008
0x000C
0x0010
0x0014
0x0018
0x001C
0x0020
0x0024
0x0028
0x002C
0x0030
0x0034
0x0038
0x003C
0x0040
0x0044
0x0048
0x004C
0x0050
0x0054
0x0058
0x005C
0x0060
0x0064
0x0068
0x006C
PIO User Interface
SAM7SE512/256/32 Preliminary
PIO Register Mapping
Register
PIO Enable Register
PIO Disable Register
PIO Status Register
Reserved
Output Enable Register
Output Disable Register
Output Status Register
Reserved
Glitch Input Filter Enable Register
Glitch Input Filter Disable Register
Glitch Input Filter Status Register
Reserved
Set Output Data Register
Clear Output Data Register
Output Data Status Register
Pin Data Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Interrupt Status Register
Multi-driver Enable Register
Multi-driver Disable Register
Multi-driver Status Register
Reserved
Pull-up Disable Register
Pull-up Enable Register
Pad Pull-up Status Register
Reserved
Each I/O line controlled by the PIO Controller is associated with a bit in each of the PIO Control-
ler User Interface registers. Each register is 32 bits wide. If a parallel I/O line is not defined,
writing to the corresponding bits has no effect. Undefined bits read zero. If the I/O line is not mul-
tiplexed with any peripheral, the I/O line is controlled by the PIO Controller and PIO_PSR returns
1 systematically.
(4)
Name
PIO_PER
PIO_PDR
PIO_PSR
PIO_OER
PIO_ODR
PIO_OSR
PIO_IFER
PIO_IFDR
PIO_IFSR
PIO_SODR
PIO_CODR
PIO_ODSR
PIO_PDSR
PIO_IER
PIO_IDR
PIO_IMR
PIO_ISR
PIO_MDER
PIO_MDDR
PIO_MDSR
PIO_PUDR
PIO_PUER
PIO_PUSR
Read/Write
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Read-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Access
or
(2)
6222F–ATARM–14-Jan-11
0x0000 0000
0x0000 0000
Reset Value
0x00000000
0x00000000
0x00000000
0x00000000
(1)
(3)
–
–
–
–
–
–
–
–
–
–
–
–
–
–