SX28AC/SS Parallax Inc, SX28AC/SS Datasheet - Page 29

• Manufacturer Part Number: SX28AC/SS
• Description: IC MCU 2K FLASH 50MHZ 28SSOP
• Manufacturer: Parallax Inc
• Series: SXr

Specifications of SX28AC/SS

• Core Processor: RISC
• Core Size: 8-Bit
• Speed: 75MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 20
• Program Memory Size: 3KB (2K x 12)
• Program Memory Type: FLASH
• Ram Size: 136 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SSOP
• Product: Microcontroller Basic Stamps
• Flash: 2 KBytes
• Timers: 8 bit
• Operating Supply Voltage: 3 to 5.5 V
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: No RoHS Version Available

Parallax SX20AC/SX28AC
Figure 12-3 shows the on-chip Power-On Reset sequence
where the MCLR pin is tied to V
Note: connecting the MCLR pin directly to the V
supply is not recommended. If the V
before the DRT timeout period expires, the device will
receive a proper reset. However, Figure 12-4 depicts a
situation where V
DRT will time-out prior to V
voltage level (V
out of reset and start operating with the supply voltage not
at a valid level. In this situation, it is recommended that
you use the external RC circuit shown in Figure 12-5. The
RC delay should exceed the time period it takes V
reach a valid operating voltage.
© Parallax Inc.
Figure 12-3: Time-Out Sequence on Power-Up
( MCLR not tied to Vdd): Fast Vdd Rise Time
Figure 12-4: Time-Out Sequence on Power-Up
( MCLR not tied to Vdd): Slow Vdd Rise Time
DD
DD
min). This means the device will come
rises too slowly. In this scenario, the
DD
reaching a valid operating
DD
via a 10K resistor.
DD
signal is stable
DD
DD
to
Page 29 of 51
A 2-bit field in the FUSEX register can be used to specify
the Delay Reset Timer (DRT) timeout period that results
in an automatic wake-up from the power down mode.
Note 1: The external Power-On Reset circuit is required
only if V
discharge the capacitor quickly when V
Note 2: R < 40 kΩ is recommended to make sure that
voltage drop across R does not violate the device
electrical specifications.
Note 3: R1 = 100 Ω to 1 kΩ will limit any current
flowing into MCLR from external capacitor C. This helps
prevent MCLR pin breakdown due to Electrostatic
Discharge (ESD) or Electrical Overstress (EOS).
13.0 BROWN-OUT DETECTOR
The on-chip brown-out detection circuitry resets the
device when V
voltage. The device is held in reset as long as V
below the brown-out voltage. The device will come out of
reset when V
brown-out level is preset to approximately 4.2 V at the
factory. The brown-out circuit can be disabled through
BOR0 and BOR1 bits contained in the FUSEX Word
register.
Figure 12-5: External Power-On Reset Circuit
(For Slow Vdd Power-Up)
10 = 0.25 msec
11 = 18 msec (default)
00 = 60 msec
01 = 1 sec
DD
power-up is too slow. The diode D helps
DD
DD
rises above the brown-out voltage. The
dips below the specified brown-out
DD
Rev 1.6 11/20/2006
www.parallax.com
powers down.
DD
stays