EM250-RTR Ember, EM250-RTR Datasheet - Page 26

IC ZIGBEE SYSTEM-ON-CHIP 48-QFN

EM250-RTR

Manufacturer Part Number
EM250-RTR
Description
IC ZIGBEE SYSTEM-ON-CHIP 48-QFN
Manufacturer
Ember
Series
EM250r
Datasheet

Specifications of EM250-RTR

Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Applications
Home/Building Automation, Industrial Control and Monitoring
Power - Output
3dBm
Sensitivity
-97dBm
Voltage - Supply
2 V ~ 3.6 V
Current - Receiving
35.5mA
Current - Transmitting
33mA
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 5kB SRAM
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
For Use With
636-1009 - PROGRAMMER USB FLASH EM250/260
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate - Maximum
-
Other names
636-1000-2

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Manufacturer
Quantity
Price
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EM250-RTR
Manufacturer:
TI
Quantity:
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Part Number:
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Manufacturer:
EMBER
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Company:
Part Number:
EM250-RTR
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EM250
4.14 Power Management
26
120-0082-000I
CLK_SEL
0
1
CLK_DIV[3:0]
N = 0..10
N = 11..15
The EmberZNet software allows the application to define the clock source and prescaler value. Therefore, a
programmable sleep/wake duty cycle can be configured according to the application requirements.
The EM250 supports three different power modes: processor ACTIVE, processor IDLE, and DEEP SLEEP.
The IDLE power mode stops code execution of the XAP2b until any interrupt occurs or an external SIF wakeup
command is seen. All peripherals of the EM250 including the radio continue to operate normally.
The DEEP SLEEP power mode powers off most of the EM250 but leaves the critical chip functions, such as the
GPIO pads and RAM powered by the High Voltage Supply (VDD_PADS). The EM250 can be woken by configuring
the sleep timer to generate an interrupt after a period of time, using an external interrupt, or with the SIF in-
terface. Activity on a serial interface may also be configured to wake the EM250, though actual reception of
data is not re-enabled until the EM250 has finished waking up. Depending on the speed of the serial data, it is
possible to finish waking up in the middle of a byte. Care must be taken to reset the serial interface between
bytes and discard any garbage data before the rest. Another condition for wakeup is general activity on GPIO
pins. The GPIO activity monitoring is described in section 5.1.
When in DEEP SLEEP, the internal regulator is disabled and VREG_OUT is turned off. All GPIO output signals
are maintained in a frozen state. Additionally, the state of all registers in the powered-down low-voltage do-
main of the EM250 is lost. Register settings for application peripherals should be preserved by the application
as desired. The operation of DEEP SLEEP is controlled by EmberZNet APIs which automatically preserve the
state of necessary system peripherals. The internal XAP2b CPU registers are automatically saved and restored
to RAM by hardware when entering and leaving the DEEP SLEEP mode, allowing code execution to continue
from where it left off. The event that caused the wakeup and any additional events that occurred while wak-
ing up are reported to the application via the EmberZNet APIs. Upon waking from DEEP SLEEP, the internal
regulator is re-enabled.
Clock Source
Calibrated 1kHz clock
32.768kHz clock
Clock Source Prescale Factor
2
2
N
10
Table 16. Sleep Timer Clock Source Prescaling
Table 15. Sleep Timer Clock Source Selection

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