EM250-RTR Ember, EM250-RTR Datasheet - Page 43

• Manufacturer Part Number: EM250-RTR
• Description: IC ZIGBEE SYSTEM-ON-CHIP 48-QFN
• Manufacturer: Ember
• Series: EM250r

Specifications of EM250-RTR

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee
• Applications: Home/Building Automation, Industrial Control and Monitoring
• Power - Output: 3dBm
• Sensitivity: -97dBm
• Voltage - Supply: 2 V ~ 3.6 V
• Current - Receiving: 35.5mA
• Current - Transmitting: 33mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB Flash, 5kB SRAM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN
• For Use With: 636-1009 - PROGRAMMER USB FLASH EM250/260
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Rate - Maximum: -
• Other names: 636-1000-2

2
2
2
2
2
2
2
1
1
1
1
1
1
1
SC1_SPICFG
0
0
0
0
1
-
-
Serialized SC1 SPI transmit data is driven to the output pin MO. SC1 SPI master data is received from the input
pin MI. To generate slave select signals to SPI slave devices, other GPIO pins have to be used and their asser-
tion must be controlled by software.
Characters transmitted and received are passed through transmit and receive FIFOs. The transmit and receive
FIFOs are 4 bytes deep. These FIFOs are accessed under software control by accessing the
ister or under hardware control using a DMA controller.
When a transmit character is written to the (empty) transmit FIFO, the register bit
SC1_SPISTAT
acters can be written to the transmit FIFO until it is full, which causes the register bit
SC1_SPISTAT
character becomes available in the transmit FIFO. This causes the register bit
SC1_SPISTAT
the register bit
Any character received is stored in the (empty) receive FIFO. The register bit
SC1_SPISTAT
software or DMA is not reading from the receive FIFO, the receive FIFO will store up to 4 characters. Any fur-
ther reception is dropped and the register bit
hardware generates the
til the RX FIFO is drained. Once the DMA marks a RX error, there are two conditions that will clear the error
0
0
1
1
-
-
-
0
1
0
1
-
-
-
SC1-3M mode
SC1-3M mode
SC1-3M mode
SC1-3M mode
SC1-3M mode Same as above except LSB first instead of MSB first
SC1-2 mode
SC1-4A mode
register clears and indicates that not all characters are transmitted yet. Further transmit char-
register to clear. After shifting one transmit character to the MO pin, space for one transmit
register to get set. After all characters are shifted out, the transmit FIFO empties, which causes
register is set to indicate that not all received characters are read out from receive FIFO. If
SC_SPITXIDLE
Table 21. SC1 SPI Master Frame Format
INT_SCRXOVF
Frame Format
Illegal
Illegal
MCLK
MCLK
MCLK
MCLK
MO
MO
MO
MO
MI
MI
MI
in the
MI
out
out
out
out
out
out
in
out
out
in
in
in
SC1_SPISTAT
interrupt, but the DMA register will not indicate the error condition un-
RX[7]
RX[7]
TX[7]
RX[7]
TX[7]
TX[7]
TX[7]
RX[7]
SC_SPIRXOVF
TX[6]
RX[6]
TX[6]
RX[6]
TX[6]
RX[6]
RX[6]
TX[6]
register to get set also.
RX[5]
TX[5]
RX[5]
TX[5]
RX[5]
TX[5]
RX[5]
TX[5]
in the
RX[4]
RX[4]
RX[4]
TX[4]
RX[4]
TX[4]
TX[4]
TX[4]
SC1_SPISTAT
RX[3]
TX[3]
RX[3]
RX[3]
RX[3]
TX[3]
TX[3]
TX[3]
SC_SPIRXVAL
SC_SPITXFREE
register is set. The RX FIFO
RX[2]
TX[2]
TX[2]
RX[2]
TX[2]
RX[2]
RX[2]
TX[2]
SC_SPITXIDLE
SC_SPITXFREE
120-0082-000I
TX[1]
RX[1]
RX[1]
RX[1]
TX[1]
TX[1]
RX[1]
TX[1]
SC1_DATA
in the
in the
EM250
RX[0]
TX[0]
RX[0]
RX[0]
TX[0]
TX[0]
TX[0]
RX[0]
in the
data reg-
in the
43