SLRC40001T/OFE,112 NXP Semiconductors, SLRC40001T/OFE,112 Datasheet - Page 62

• Manufacturer Part Number: SLRC40001T/OFE,112
• Description: IC I.CODE SLRC400 READER 32-SOIC
• Manufacturer: NXP Semiconductors
• Series: I-Coder

Specifications of SLRC40001T/OFE,112

• Rf Type: Read Only
• Frequency: 13.56MHz
• Features: ISO15693, ISO18000-3
• Package / Case: 32-SOIC (0.300", 7.50mm Width)
• Product: RFID Readers
• Operating Temperature Range: - 25 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1124-5; 935269551112; SLRC400; SLRC41TOFED

Philips Semiconductors
I•CODE Reader IC
5.4
There are three mechanisms to operate the SL RC400:
The commands, configurations bits and flags are accessed via the µ-Processor interface.
The SL RC400 can internally address 64 registers. This basically requires six address lines.
5.4.1
The SL RC400 register set is segmented into 8 pages with 8 register each. The Page-Register can always
be addressed, no matter which page is currently selected.
5.4.2
Using the SL RC400 with dedicated address bus, the µ-Processor defines three address lines via the
address pins A0, A1, and A2. This allows addressing within a page. To switch between registers in different
pages the paging mechanism needs then to be used.
The following table shows how the register address is assembled:
5.4.3
Using the SL RC400 with multiplexed address bus, the µ-Processor may define all six address lines at once.
In this case either the paging mechanism or linear addressing may be used.
The following table shows how the register address is assembled:
Multiplexed Address Bus
Multiplexed Address Bus
UsePageSelect
Register Bit:
Interface Bus Type
(linear addressing)
•
•
•
(paging mode)
Modes of Register Addressing
Initiating functions and controlling data manipulation by executing commands
Configuring electrical and functional behaviour via a set of configuration bits
Monitoring the state of the SL RC400 by reading status flags
PAGING MECHANISM
DEDICATED ADDRESS BUS
1
MULTIPLEXED ADDRESS BUS
PageSelect2
Table 5-4: Multiplexed Address Bus: Assembling the Register Address
Table 5-3: Dedicated Address Bus: Assembling the Register Address
UsePageSelect
Register Bit:
1
0
PageSelect1
PageSelect2
Register-Address
AD5
PageSelect0
62
PageSelect1
AD4
Product Specification Rev. 3.1 August 2004
A2
Register-Address
PageSelect0
A1
AD3
A0
AD2
AD2
SL RC400
AD1
AD1
AD0
AD0