M0516ZAN Nuvoton Technology Corporation of America, M0516ZAN Datasheet - Page 114

• Manufacturer Part Number: M0516ZAN
• Description: IC MCU 32BIT 64KB FLASH 33QFN
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r

Specifications of M0516ZAN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 5x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 33-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

[6]
[5]
[4]
[3]
[2]
[1]
[0]
PD_WU_STS
PD_WU_INT_EN
PD_WU_DLY
OSC10K_EN
OSC22M_EN
Reserved
XTL12M_EN
NuMicro M051
the PWR_DOWN_EN bit set.
(b) if the PD_WAIT_CPU is “1”, then the chip keeps active till the CPU sleep mode is also
active and then the chip enters power down mode
When chip wakes up from power down mode, this bit is auto cleared. Users need to set this
bit again for next power down.
When in power down mode, external crystal (4~ 24MHz) and the 22.1184 MHz OSC will be
disabled in this mode, but the 10 kHz OSC is not controlled by power down mode.
When in power down mode, the PLL and system clock are disabled, and ignored the clock
source selection. The clocks of peripheral are not controlled by power down mode, if the
peripheral clock source is from 10 kHz oscillator.
1 = Chip enter the power down mode instant or wait CPU sleep command WFI
0 = Chip operate in normal mode or CPU in idle mode (sleep mode) because of WFI
command
Chip power down wake up status flag
Set by “power down wake up”, it indicates that resume from power down mode”
The flag is set if the GPIO(P0~P4), and UART wakeup
Write 1 to clear this bit to zero.
Power down mode wake Up Interrupt Enable
0 = Disable
1 = Enable. The interrupt will occur when Power down mode(Deep Sleep Mode) wakeup.
Enable the wake up delay counter.
When the chip wakes up from power down mode, the clock control will delay
certain clock cycles to wait system clock stable.
The delayed clock cycle is 4096 clock cycles when chip work at external crystal
(4 ~ 24MHz), and 256 clock cycles when chip work at 22.1184 MHz oscillator.
1 = Enable clock cycles delay
0 = Disable clock cycles delay
Internal 10 kHz Oscillator Control
1 = 10 kHz Oscillation enable
0 = 10 kHz Oscillation disable
Internal 22.1184 MHz Oscillator Control
1 = 22.1184 MHz Oscillation enable
0 = 22.1184 MHz Oscillation disable
Reserve
External Crystal Oscillator Control
™
Series Technical Reference Manual
- 114 -
Publication Release Date: Sep 14, 2010
Revision V1.2