M0516ZAN Nuvoton Technology Corporation of America, M0516ZAN Datasheet - Page 152

• Manufacturer Part Number: M0516ZAN
• Description: IC MCU 32BIT 64KB FLASH 33QFN
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r

Specifications of M0516ZAN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 5x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 33-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Port 0-4 Interrupt Enable Control (Px _IEN)
Register
P0_IEN
P1_IEN
P2_IEN
P3_IEN
P4_IEN
Bits
[31:24]
[n+16]
31
23
15
7
NuMicro M051
Descriptions
Reserved
IR_EN[n]
Offset
GP_BA+0x01C R/W
GP_BA+0x05C R/W
GP_BA+0x09C R/W
GP_BA+0x0DC R/W
GP_BA+0x11C R/W
30
22
14
6
Reserved
Port 0-4 Interrupt Enable by Input Rising Edge or Input Level High
IR_EN[n] used to enable the interrupt for each of the corresponding input Px[n]. Set bit
“1” also enable the pin wakeup function
When set the IR_EN[n] bit “1”:
If the interrupt is level mode trigger, the input Px[n] state at level “high” will generate the
interrupt.
If the interrupt is edge mode trigger, the input Px[n] state change from “low-to-high” will
generate the interrupt.
1 = Enable the Px[n] level-high or low-to-high interrupt
0 = Disable the Px[n] level-high or low-to-high interrupt.
R/W
29
21
13
5
™
Description
P0 Interrupt Enable
P1 Interrupt Enable
P2 Interrupt Enable
P3 Interrupt Enable
P4 Interrupt Enable
Series Technical Reference Manual
28
20
12
4
IR_EN[7:0]
- 152 -
IF_EN[7:0]
Reserved
Reserved
27
19
11
3
Publication Release Date: Sep 14, 2010
26
18
10
2
25
17
9
1
Revision V1.2
Reset Value
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
24
16
8
0