M0516ZAN Nuvoton Technology Corporation of America, M0516ZAN Datasheet - Page 325

• Manufacturer Part Number: M0516ZAN
• Description: IC MCU 32BIT 64KB FLASH 33QFN
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro M051™r

Specifications of M0516ZAN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 5x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 33-WFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

A/D Channel Enable Register (ADCHER)
NuMicro M051
[7:6]
[5:4]
[3:2]
[1]
[0]
Register
ADCHER
TRGCOND
TRGS
ADMD
ADIE
ADEN
Offset
ADC_BA+0x24
™
Series Technical Reference Manual
External Trigger Condition
These two bits decide external pin STADC trigger event is level or edge. The
signal must be kept at stable state at least 8 PCLKs for level trigger and 4
PCLKs at high and low state for edge trigger.
00 = Low level
01 = High level
10 = Falling edge
11 = Rising edge
Hardware Trigger Source
00 = A/D conversion is started by external STADC pin.
Others = Reserved
Software should disable TRGEN and ADST before change TRGS.
In hardware trigger mode, the ADST bit is set by the external trigger from
STADC.
A/D Converter Operation Mode
00 = Single conversion
01 = Burst conversion
10 = Single-cycle scan
11 = Continuous scan
When changing the operation mode, software should disable ADST bit firstly.
Note: In Burst Mode, the A/D result data always at Data Register 0.
A/D Interrupt Enable
1 = Enable A/D interrupt function
0 = Disable A/D interrupt function
A/D conversion end interrupt request is generated if ADIE bit is set to 1.
A/D Converter Enable
1 = Enable
0 = Disable
Before starting A/D conversion function, this bit should be set to 1. Clear it to 0
to disable A/D converter analog circuit power consumption.
R/W
R/W
- 325 -
Description
A/D Channel Enable
Publication Release Date: Sept 14, 2010
Revision V1.2
Reset Value
0x0000_0000