MT48LC8M16A2P-75 IT:G TR Micron Technology Inc, MT48LC8M16A2P-75 IT:G TR Datasheet - Page 18

• Manufacturer Part Number: MT48LC8M16A2P-75 IT:G TR
• Description: DRAM Chip SDRAM 128M-Bit 8Mx16 3.3V 54-Pin TSOP-II T/R
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC8M16A2P-75 IT:G TR

• Density: 128 Mb
• Maximum Clock Rate: 133 MHz
• Package: 54TSOP-II
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 3.3 V
• Maximum Random Access Time: 6|5.4 ns
• Operating Temperature: -40 to 85 °C
• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 54-TSOP II
• Organization: 8Mx16
• Address Bus: 14b
• Access Time (max): 6/5.4ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 150mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1099-2

Figure 7:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
A8
0
–
A9
0
1
A7
0
–
Mode Register Definition
Programmed Burst Length
Defined
A6–A0
Single Location Access
to ensure compatibility
–
Write Burst Mode
with future devices.
A11, A10 = “0, 0”
Operating Mode
Standard Operation
All other states reserved
Program
Reserved WB
11
A11
10
A10
A6
0
0
0
0
1
1
1
1
9
A9
A5
Op Mode
0
0
1
1
0
0
1
1
8
A8
A4
0
1
0
1
0
1
0
1
7
A7
18
CAS Latency
6
A6
CAS Latency
5
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
A5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2
3
4
A4
A3
BT
0
1
3
A3
A2
0
0
0
0
1
1
1
1
Burst Length
2
A2
A1
0
0
1
1
0
0
1
1
128Mb: x4, x8, x16 SDRAM
A0
1
0
1
0
1
0
1
0
1
A1
Functional Description
0
A0
Reserved
Reserved
Reserved
Full Page
©1999 Micron Technology, Inc. All rights reserved.
A3 = 0
Burst Type
Interleaved
Sequential
1
2
4
8
Mode Register (Ax)
Address Bus
Burst Length
Reserved
Reserved
Reserved
Reserved
A3 = 1
1
2
4
8