MT48LC8M16A2P-75 IT:G TR Micron Technology Inc, MT48LC8M16A2P-75 IT:G TR Datasheet - Page 68

DRAM Chip SDRAM 128M-Bit 8Mx16 3.3V 54-Pin TSOP-II T/R

MT48LC8M16A2P-75 IT:G TR

Manufacturer Part Number
MT48LC8M16A2P-75 IT:G TR
Description
DRAM Chip SDRAM 128M-Bit 8Mx16 3.3V 54-Pin TSOP-II T/R
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC8M16A2P-75 IT:G TR

Density
128 Mb
Maximum Clock Rate
133 MHz
Package
54TSOP-II
Address Bus Width
14 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
6|5.4 ns
Operating Temperature
-40 to 85 °C
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
128M (8Mx16)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Package / Case
54-TSOP II
Organization
8Mx16
Address Bus
14b
Access Time (max)
6/5.4ns
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
150mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1099-2
Figure 52:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
DQML, DQMH
COMMAND
A0–A9, A11
BA0, BA1
DQM /
CKE
A10
CLK
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
Single WRITE – With Auto Precharge
t CMH
t CKH
t AH
t AH
t AH
Notes:
t RCD
t RAS
t RC
t CK
T1
NOP 3
1. For this example, BL = 1.
2. x16: A9 and A11 = “Don’t Care.”
3. Write command not allowed or
x8: A11 = “Don’t Care.”
t CL
NOP 3
T2
t CH
NOP 3
T3
ENABLE AUTO PRECHARGE
t CMS
t DS
COLUMN m 2
BANK
WRITE
T4
D
IN
t CMH
t DH
m
68
t WR
t
RAS would be violated.
T5
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T6
NOP
t RP
128Mb: x4, x8, x16 SDRAM
T7
NOP
©1999 Micron Technology, Inc. All rights reserved.
Timing Diagrams
ACTIVE
ROW
ROW
BANK
T8
T9
NOP
DON’T CARE

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