TXC-03303-ARPQ Transwitch Corporation, TXC-03303-ARPQ Datasheet - Page 14

• Manufacturer Part Number: TXC-03303-ARPQ
• Manufacturer: Transwitch Corporation

Specifications of TXC-03303-ARPQ

• Lead Free Status / RoHS Status: Compliant

RECEIVE C-BIT INTERFACE
Symbol
Symbol
CDCCR
CCKR
CFMR
S(7-5)
CDR
85, 86, 87
Pin No.
Pin No.
65
66
64
61
I/O/P
I/O/P
O
O
O
O
I
TTL8mA
TTL8mA
TTL8mA
TTL8mA
TTLp
Type
Type
- 14 -
Address Straps: When the Intel, Motorola, or Multi-
plexed ( P1 = 1 and P0 = 0) microprocessor interfaces
are selected, the two address straps, S7 and S6, allow
the M13E to be partitioned as a segment of memory. The
straps define the address offset of the device. The
address register is partitioned as shown below. The data
register pointed to by the 6 LSBs is only accessed if the 2
MSBs match the address straps.
Address register partition for Intel, Motorola, or Multi-
plexed ( P1 = 1 and P0 = 0) microprocessor interfaces:
When the multiplexed microprocessor interface is
selected, by setting P1 = 1 and P0 = 1, the three
address straps, S7, S6, and S5, allow the M13E to be
partitioned as a segment of memory. The straps define
the offset of the device. The address register is parti-
tioned as shown below. The data register pointed to by
the five LSBs is only accessed if the three MSBs match
the address straps.
Address register partition for the multiplexed micropro-
cessor interface when P1 = 1 and P0 = 1:
Receive C-Bit Clock: A gapped clock signal is provided
for clocking out the selected receive C-bit data. Data
(CDR) is clocked out on positive transitions.
Receive C-Bit Data: The following C-bits are provided at
this interface: C2, C3, C4, C5, C6, C13, C14, C15, C16,
C17, C18, C19, C20, and C21.
Receive C-Bit Framing Pulse: This positive framing
pulse occurs prior to the C2 bit.
Receive Data Link Indication: A positive pulse that
identifies the location of the three data link C-bits (C13,
C14, and C15). The receive C-bit clock (CCKR) may be
and-gated with this signal to provide a gapped data link
clock signal for loading the three C-bits from the C-bit
data (CDR) into external circuitry. This signal is enabled
by placing a high on the signal lead labeled DLEN.
Bit 7
Bit 7
Address
M13E
Address
M13E
6
6
Name/Function
Name/Function
5
Register
Address
Register
Address
Ed. 4, August 1998
TXC-03303
TXC-03303-MB
M13E