TXC-03303-ARPQ Transwitch Corporation, TXC-03303-ARPQ Datasheet - Page 33

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TXC-03303-ARPQ

Manufacturer Part Number
TXC-03303-ARPQ
Description
Manufacturer
Transwitch Corporation
Datasheet

Specifications of TXC-03303-ARPQ

Lead Free Status / RoHS Status
Compliant
Address
(cont.)
00
01
Bit
0
5
4
3
2
1
0
Symbol
PBITE
CBITE
T3AIS
T3IDL
FEBE
XR1
XT
Receive DS3 X-bit Number 1: This bit position indicates the receive state
of X1. This bit position is updated each frame.
Transmit DS3 Alarm Indication Signal: A one causes the M13E to trans-
mit a DS3 AIS. The type of AIS sent is determined by the states written into
bit 1 (T3AIS1) and bit 0 (T3AIS0) in register 21H.
Transmit DS3 Idle Signal: To transmit a DS3 idle signal, (i) a one must be
written in this bit 4 (T3IDL) register location, and (ii) a one must also be writ-
ten (if not already written) into bit 0 (XT) of this register 01H, and (iii) bit 0
(T3AIS0) and bit 1 (T3AIS1) of register 21H must also be set to zero.
Transmit Far End Block Error: A one causes the M13E to transmit a sin-
gle FEBE error indication (C10, C11, and C12 equal to 0) in the next DS3
frame. To send an additional FEBE indication, the microprocessor must first
write a zero followed by a one.
Transmit P-Bit Parity Error: A one causes the M13E to transmit a single
P-bit parity error in the next DS3 frame. The P-bit error is transmitted by
inverting the value of the two calculated bits. To send an additional error,
the microprocessor must first write a zero followed by a one.
Transmit C-Bit Parity Error: A one causes the M13E to transmit a single
C-bit parity error in the next available DS3 frame when the M13E is operat-
ing in the C-bit parity mode. The C-bit error is transmitted by inverting the
calculated C-bit parity bits in subframe 3 (C7, C8, and C9). To send an
additional error, the microprocessor must first write a zero followed by a
one.
Transmit X-Bits: The X-bits may be used to transmit a yellow alarm or may
be used as a low speed signaling channel. A one or zero causes the M13E
to transmit a one or zero for both X1 and X2. Note: Set to 1 when transmit-
ting DS3 idle signal (see T3IDL in this register 01H).
- 33 -
Description
Ed. 4, August 1998
TXC-03303
TXC-03303-MB
M13E

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