FLLXT384BE.A5 Intel, FLLXT384BE.A5 Datasheet - Page 34

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FLLXT384BE.A5

Manufacturer Part Number
FLLXT384BE.A5
Description
Manufacturer
Intel
Datasheet

Specifications of FLLXT384BE.A5

Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Not Compliant
Intel
5.4
34
Table 10. Line Interface Unit Signals (Sheet 1 of 3)
®
LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
Line Interface Unit Signals
For multi-function pins, the pin name in
D7 /
D6 /
D5 /
D4 /
D3 /
D2 /
D1 /
D0 /
1. AI: Analog Input. AO: Analog Output. DI: Digital Input. DI/O: Digital Bidirectional Port. DO: Digital Output.
Signal
Name
LOOP7
LOOP6
LOOP5
LOOP4
LOOP3
LOOP2
LOOP1
LOOP0
QFP
Pin
28
27
26
25
24
23
22
21
PBGA
Ball
G2
K1
H2
H3
J1
J2
J3
J4
Signal
Type
DI/O
Loopback Mode Input/Output.
When the LXT384 Transceiver is in the Hardware mode and a
LOOPx pin is:
When the LXT384 Transceiver is in the Host Processor mode with
a:
For other pin functions, see D7:0 in
Standard Bus and Interface
blue bold
• Low, the LXT384 Transceiver enters Remote loopback.
• High, the LXT384 Transceiver enters Analog loopback.
• Left unconnected, LOOPx stays in a high-impedance tristate.
• Parallel interface, see the signal descriptions for D7:0 in
• Serial interface, LOOP7:0 must be grounded.
• This mode ignores data on TPOS and TNEG, although a
• Data received on RTIP and RRING is looped around and
• In data recovery mode, the pulse template cannot be
• This mode ignores data received on RTIP and RRING.
• Data transmitted on TTIP and TRING is internally looped
• Loopback is no longer selected.
• If the LXT384 Transceiver is used in Hardware mode, to
Section 5.2, “Microprocessor-Standard Bus and Interface
Signals”.
TCLK input is still required. An option is to connect RCLK
to TCLK externally, outside the transceiver.
retransmitted on TTIP and TRING.
guaranteed while in a remote loopback. (For details, see
Section 6.7.3, “Remote
around and routed back to the receive inputs. (For details,
see
minimize cross-talk, the layout design must not route
signals with fast transitions near the LOOP7:0 pins. Also
maintain a solid ground plane under these pins.
Section 6.7.1, “Analog
print indicates the signal being discussed.
Signal Description
Signals”.
Loopback”.)
Loopback”.)
Section 5.2, “Microprocessor-
Revision Date: November 28, 2005
Document Number: 248994
Revision Number: 005

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