FWLXT9785BC Cortina Systems Inc, FWLXT9785BC Datasheet - Page 185

• Manufacturer Part Number: FWLXT9785BC
• Manufacturer: Cortina Systems Inc

Specifications of FWLXT9785BC

• Lead Free Status / RoHS Status: Not Compliant

LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Figure 53
Table 75
Figure 54
Cortina Systems
RMII - 100BASE-FX Receive Timing
RMII - 100BASE-FX Receive Timing Parameters
RMII - 100BASE-FX Transmit Timing
®
RxData<1:0>, CRS_DV, RXER setup to
REFCLK rising edge
RxData<1:0>, CRS_DV, RXER hold from
REFCLK rising edge
Receive start of /J/ to CRS_DV asserted
Receive start of /T/ to CRS_DV de-asserted
1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production
2. “BT” signifies bit times at the line rate (that is, BT = 100 ns if using 10BASE-T, BT = 10 ns if using
3. Values and conditions from RMII Specification, Rev. 1.2.
Note:
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
testing.
100BASE-TX or 100BASE-FX).
RxData[1:0]
The table latency values are derived with the hardware configuration pins FIFOSEL[1:0] set at a
default configuration of 00 (32 bits of initial fill).
TxData(1:0)
CRS_DV
REFCLK
REFCLK
TPFI
TPFO
TxEN
Parameter
3
3
t
1
t
3
t
3
Sym
t1
t2
t3
t4
t
1
t
1
Min
t
4
2
–
–
2
t
2
Typ1
14
18
–
–
t
4
Max
14
14
18
25
6.0 Test Specifications
Units
BT
BT
ns
ns
2
2
t
2
Conditions
Test
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