FWLXT9785BC Cortina Systems Inc, FWLXT9785BC Datasheet - Page 2

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FWLXT9785BC

Manufacturer Part Number
FWLXT9785BC
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of FWLXT9785BC

Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FWLXT9785BC
Manufacturer:
HIT
Quantity:
28
Part Number:
FWLXT9785BC.D0
Manufacturer:
Intel
Quantity:
10 000
LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Contents
1.0
2.0
3.0
4.0
Cortina Systems
Introduction..................................................................................................................................18
1.1
1.2
Block Diagram .............................................................................................................................19
Pin/Ball Assignments and Signal Descriptions ........................................................................20
3.1
3.2
3.3
3.4
3.5
3.6
Functional Description..............................................................................................................113
4.1
4.2
4.3
What You Will Find in This Document ................................................................................18
Related Documents ............................................................................................................18
PQFP Pin Assignments ......................................................................................................20
3.1.1
3.1.2
3.1.3
PQFP Signal Descriptions ..................................................................................................36
3.2.1
3.2.2
BGA23 Ball Assignments....................................................................................................51
3.3.1
3.3.2
3.3.3
BGA23 Signal Descriptions ................................................................................................79
3.4.1
3.4.2
BGA15 Ball Assignments....................................................................................................97
3.5.1
BGA15 Signal Descriptions ..............................................................................................106
3.6.1
3.6.2
Introduction .......................................................................................................................113
4.1.1
4.1.2
Interface Descriptions .......................................................................................................114
4.2.1
Media Independent Interface (MII) Interfaces ...................................................................116
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
4.3.7
4.3.8
®
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
PQFP Pin Assignments – RMII Configuration .......................................................20
PQFP Pin Assignments – SMII Configuration........................................................26
PQFP Pin Assignments – SS-SMII Configuration..................................................31
Signal Name Conventions .....................................................................................36
PQFP Signal Descriptions – RMII, SMII, and SS-SMII Configurations..................36
RMII BGA23 Ball List .............................................................................................52
SMII BGA23 Ball List .............................................................................................61
SS-SMII BGA23 Ball List .......................................................................................70
Signal Name Conventions .....................................................................................79
Signal Descriptions – RMII, SMII, and SS-SMII Configurations.............................80
BGA15 Ball List......................................................................................................98
Signal Name Conventions ...................................................................................106
Signal Descriptions – SMII and SS-SMII Configurations .....................................106
OSP™ Architecture .............................................................................................113
Comprehensive Functionality ..............................................................................114
4.1.2.1
10/100 Network Interface.....................................................................................114
4.2.1.1
4.2.1.2
4.2.1.3
Global MII Mode Select .......................................................................................117
Internal Loopback ................................................................................................117
RMII Data Interface..............................................................................................118
Serial Media Independent Interface (SMII) and Source Synchronous- Serial Media
Independent Interface (SS-SMII) .........................................................................118
4.3.4.1
4.3.4.2
Configuration Management Interface ..................................................................118
MII Isolate ............................................................................................................118
MDIO Management Interface ..............................................................................119
MII Sectionalization..............................................................................................120
Sectionalization....................................................................................114
Twisted-Pair Interface ..........................................................................115
MDI Crossover (MDIX).........................................................................116
Fiber Interface......................................................................................116
SMII Interface.......................................................................................118
Source Synchronous-Serial Media Independent Interface ..................118
Contents
Page 2

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