PIC32MX210F016B-I/SO Microchip Technology, PIC32MX210F016B-I/SO Datasheet - Page 59

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PIC32MX210F016B-I/SO

Manufacturer Part Number
PIC32MX210F016B-I/SO
Description
PIC32, 16KB Flash, 4KB RAM, 40 MHz, USB, CTMU, 4 DMA 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Datasheet
TABLE 4-16:
Legend:
Note
F000 OSCCON
F010 OSCTUN
F020 REFOCON
F030 REFOTRIM
0000 WDTCON
F600
F610 RSWRST
F200 CFGCON
F230 SYSKEY
F240
F250
F260
F270
F280
F290
1:
2:
3:
4:
RCON
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
With the exception of those noted, all registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
“CLR, SET and INV Registers”
Reset values are dependent on the DEVCFGx Configuration bits and the type of reset.
This register does not have associated CLR, SET, INV registers.
This bit is available on PIC32MX2XX devices only.
(3)
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
SYSTEM CONTROL REGISTER MAP
31/15
ON
ON
30/14
COSC<2:0>
for more information.
IOLOCK PMDLOCK
29/13
SIDL
PLLODIV<2:0>
CVRMD
28/12
OE
ROTRIM<8:0>
RSLP
27/11
(1)
26/10
FRCDIV<2:0>
NOSC<2:0>
DIVSWEN ACTIVE
SPI2MD
CMR
25/9
CTMUMD
USB1MD
SPI1MD
VREGS
24/8
SYSKEY<31:0>
CLKLOCK ULOCK
Bits
RODIV<14:0>
EXTR
23/7
SOSCRDY PBDIVRDY
SWR
22/6
(4)
SLOCK
21/5
SWDTPS<4:0>
OC5MD
SLPEN
IC5MD
WDTO
T5MD
20/4
PBDIV<1:0>
JTAGEN
OC4MD
SLEEP
IC4MD
T4MD
19/3
CF
TUN<5:0>
UFRCEN
CMP3MD
OC3MD
IC3MD
T3MD
IDLE
18/2
ROSEL<3:0>
(4)
PLLMULT<2:0>
WDTWINEN WDTCLR 0000
SOSCEN
CMP2MD CMP1MD 0000
REFOMD RTCCMD 0000
OC2MD
I2C1MD
IC2MD
U2MD
T2MD
BOR
17/1
OSWEN xxxx
I2C1MD
PMPMD
SWRST
TDOEN
AD1MD
OC1MD
IC1MD
U1MD
T1MD
POR
16/0
Section 11.2
x1xx
xxxx
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
000B
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
(2)
(2)
(2)

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