PIC32MX210F016B-I/SO Microchip Technology, PIC32MX210F016B-I/SO Datasheet - Page 69

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PIC32MX210F016B-I/SO

Manufacturer Part Number
PIC32MX210F016B-I/SO
Description
PIC32, 16KB Flash, 4KB RAM, 40 MHz, USB, CTMU, 4 DMA 28 SOIC .300in TUBE
Manufacturer
Microchip Technology
Datasheet
TABLE 4-25:
TABLE 4-26:
Legend:
Note
Legend:
Note
0200 RTCCON
0210 RTCALRM
0220 RTCTIME
0230 RTCDATE
0240 ALRMTIME
0250 ALRMDATE
A200 CTMUCON
1:
1:
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See
information.
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See
information.
31:16 EDG1MOD EDG1POL
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0 ALRMEN
15:0
15:0
15:0
15:0
RTCC REGISTER MAP
CTMU REGISTER MAP
31/15
31/15
ON
ON
CHIME
30/14
30/14
YEAR10<3:0>
SEC10<3:0>
DAY10<3:0>
SEC10<3:0>
DAY10<3:0>
HR10<3:0>
HR10<3:0>
CTMUSIDL
29/13
SIDL
PIV
29/13
(1)
(1)
ALRMSYNC
28/12
TGEN
28/12
EDG1SEL<3:0>
EDGEN EDGSEQEN IDISSEN
27/11
27/11
26/10
YEAR01<3:0>
AMASK<3:0>
SEC01<3:0>
DAY01<3:0>
SEC01<3:0>
DAY01<3:0>
26/10
HR01<3:0>
HR01<3:0>
25/9
EDG2STAT EDG1STAT EDG2MOD EDG2POL
25/9
24/8
CTTRIG
24/8
Bits
Bits
RTSECSEL RTCCLKON
23/7
23/7
MONTH10<3:0>
MONTH10<3:0>
22/6
MIN10<3:0>
MIN10<3:0>
22/6
21/5
CAL<9:0>
21/5
ITRIM<5:0>
20/4
ARPT<7:0>
20/4
EDG2SEL<3:0>
Section 11.2 “CLR, SET and INV Registers”
Section 11.2 “CLR, SET and INV Registers”
RTCWREN RTCSYNC HALFSEC RTCOE 0000
19/3
19/3
MONTH01<3:0>
MONTH01<3:0>
18/2
WDAY01<3:0>
WDAY01<3:0>
MIN01<3:0>
MIN01<3:0>
18/2
17/1
17/1
IRNG<1:0>
16/0
16/0
for more
for more
0000
0000
0000
xxxx
xx00
xxxx
xx00
xxxx
xx00
00xx
xx0x
0000
0000

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