PIC32MX210F016B-I/SO Microchip Technology, PIC32MX210F016B-I/SO Datasheet - Page 80

• Manufacturer Part Number: PIC32MX210F016B-I/SO
• Description: PIC32, 16KB Flash, 4KB RAM, 40 MHz, USB, CTMU, 4 DMA 28 SOIC .300in TUBE
• Manufacturer: Microchip Technology

PIC32MX1XX/2XX
REGISTER 5-1:
DS61168D-page 80
Legend:
R = Readable bit
-n = Value at POR
bit 31-16 Unimplemented: Read as ‘0’
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10-4
bit 3-0
Note 1:
Range
31:24
23:16
15:8
7:0
Bit
WR: Write Control bit
This bit is writable when WREN = 1 and the unlock sequence is followed.
1 = Initiate a Flash operation. Hardware clears this bit when the operation completes
0 = Flash operation complete or inactive
WREN: Write Enable bit
1 = Enable writes to WR bit and enables LVD circuit
0 = Disable writes to WR bit and disables LVD circuit
This is the only bit in this register reset by a device Reset.
WRERR: Write Error bit
This bit is read-only and is automatically set by hardware.
1 = Program or erase sequence did not complete successfully
0 = Program or erase sequence completed normally
LVDERR: Low-Voltage Detect Error bit (LVD circuit must be enabled)
This bit is read-only and is automatically set by hardware.
1 = Low-voltage detected (possible data corruption, if WRERR is set)
0 = Voltage level is acceptable for programming
LVDSTAT: Low-Voltage Detect Status bit (LVD circuit must be enabled)
This bit is read-only and is automatically set, and cleared, by hardware.
1 = Low-voltage event active
0 = Low-voltage event NOT active
Unimplemented: Read as ‘0’
NVMOP<3:0>: NVM Operation bits
These bits are writable when WREN = 0.
1111 = Reserved
•
•
•
0111 = Reserved
0110 = No operation
0101 = Program Flash (PFM) erase operation: erases PFM, if all pages are not write-protected
0100 = Page erase operation: erases page selected by NVMADDR, if it is not write-protected
0011 = Row program operation: programs row selected by NVMADDR, if it is not write-protected
0010 = No operation
0001 = Word program operation: programs word selected by NVMADDR, if it is not write-protected
0000 = No operation
31/23/15/7
This bit is cleared by setting NVMOP == 0000b, and initiating a Flash operation (i.e., WR).
R/W-0
WR
Bit
U-0
U-0
U-0
—
—
—
NVMCON: PROGRAMMING CONTROL REGISTER
30/22/14/6
WREN
R/W-0
Bit
U-0
U-0
U-0
—
—
—
(1)
W = Writable bit
‘1’ = Bit is set
29/21/13/5
WRERR
Bit
U-0
U-0
R-0
U-0
—
—
—
(1)
Preliminary
LVDERR
28/20/12/4
Bit
U-0
U-0
R-0
U-0
—
—
—
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
LVDSTAT
27/19/11/3
R/W-0
Bit
U-0
U-0
R-0
—
—
(1)
26/18/10/2
(1)
R/W-0
(1)
© 2011-2012 Microchip Technology Inc.
Bit
U-0
U-0
U-0
—
—
—
NVMOP<3:0>
x = Bit is unknown
25/17/9/1
R/W-0
Bit
U-0
U-0
U-0
—
—
—
24/16/8/0
R/W-0
Bit
U-0
U-0
U-0
—
—
—